Message ID | 1507800916-11509-11-git-send-email-geert+renesas@glider.be (mailing list archive) |
---|---|
State | Accepted |
Commit | 8684a24caa3d59d9ba03f1e6f9653b49ac78ec04 |
Delegated to: | Simon Horman |
Headers | show |
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi index 549eafe8ff129edc..00bf1bec03d0a10f 100644 --- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -56,6 +56,7 @@ compatible = "arm,cortex-a15"; reg = <1>; clock-frequency = <1000000000>; + clocks = <&cpg CPG_CORE R8A7792_CLK_Z>; power-domains = <&sysc R8A7792_PD_CA15_CPU1>; next-level-cache = <&L2_CA15>; };
Currently only the primary CPU in the CA15 cluster has a clocks property, while the secondary CPU core is driven by the same clock. Add the missing clocks property to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- arch/arm/boot/dts/r8a7792.dtsi | 1 + 1 file changed, 1 insertion(+)