From patchwork Fri Oct 13 13:03:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrizio Castro X-Patchwork-Id: 10004691 X-Patchwork-Delegate: horms@verge.net.au Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9E5E460360 for ; Fri, 13 Oct 2017 13:04:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8E29528DBB for ; Fri, 13 Oct 2017 13:04:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 80FDA28DE9; Fri, 13 Oct 2017 13:04:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2450828FD0 for ; Fri, 13 Oct 2017 13:04:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758202AbdJMNEN (ORCPT ); Fri, 13 Oct 2017 09:04:13 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:64925 "EHLO relmlie4.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1758130AbdJMNEM (ORCPT ); Fri, 13 Oct 2017 09:04:12 -0400 Received: from unknown (HELO relmlir1.idc.renesas.com) ([10.200.68.151]) by relmlie4.idc.renesas.com with ESMTP; 13 Oct 2017 22:04:11 +0900 Received: from relmlii1.idc.renesas.com (relmlii1.idc.renesas.com [10.200.68.65]) by relmlir1.idc.renesas.com (Postfix) with ESMTP id BA48E7D83A; Fri, 13 Oct 2017 22:04:11 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.43,371,1503327600"; d="scan'208";a="259306544" Received: from unknown (HELO fabrizio-dev.ree.adwin.renesas.com) ([10.226.37.27]) by relmlii1.idc.renesas.com with ESMTP; 13 Oct 2017 22:04:08 +0900 From: Fabrizio Castro To: Rob Herring , Mark Rutland , Russell King Cc: Simon Horman , Magnus Damm , Geert Uytterhoeven , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Chris Paterson , Biju Das , Fabrizio Castro , Chris Paterson Subject: [PATCH 4/4] ARM: dts: iwg22d-sodimm: sort dt nodes Date: Fri, 13 Oct 2017 14:03:16 +0100 Message-Id: <1507899796-7941-5-git-send-email-fabrizio.castro@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1507899796-7941-1-git-send-email-fabrizio.castro@bp.renesas.com> References: <1507899796-7941-1-git-send-email-fabrizio.castro@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Improve the layout of r8a7745-iwg22d-sodimm.dts by sorting the nodes alphabetically. Signed-off-by: Fabrizio Castro Signed-off-by: Chris Paterson --- arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 62 ++++++++++++++--------------- 1 file changed, 31 insertions(+), 31 deletions(-) diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts index 5d5bb2f..5003a8f 100644 --- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts +++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts @@ -16,9 +16,9 @@ compatible = "iwave,g22d", "iwave,g22m", "renesas,r8a7745"; aliases { + ethernet0 = &avb; serial3 = &scif4; serial5 = &hscif1; - ethernet0 = &avb; }; chosen { @@ -40,6 +40,25 @@ }; }; +&avb { + pinctrl-0 = <&avb_pins>; + pinctrl-names = "default"; + + phy-handle = <&phy3>; + phy-mode = "gmii"; + renesas,no-ether-link; + status = "okay"; + + phy3: ethernet-phy@3 { + /* + * On some older versions of the platform (before R4.0) the phy address + * may be 1 or 3. The address is fixed to 3 for R4.0 onwards. + */ + reg = <3>; + micrel,led-mode = <1>; + }; +}; + &hscif1 { pinctrl-0 = <&hscif1_pins>; pinctrl-names = "default"; @@ -48,7 +67,18 @@ status = "okay"; }; +&pci1 { + status = "okay"; + pinctrl-0 = <&usb1_pins>; + pinctrl-names = "default"; +}; + &pfc { + avb_pins: avb { + groups = "avb_mdio", "avb_gmii"; + function = "avb"; + }; + hscif1_pins: hscif1 { groups = "hscif1_data", "hscif1_ctrl"; function = "hscif1"; @@ -59,11 +89,6 @@ function = "scif4"; }; - avb_pins: avb { - groups = "avb_mdio", "avb_gmii"; - function = "avb"; - }; - sdhi0_pins: sd0 { groups = "sdhi0_data4", "sdhi0_ctrl"; function = "sdhi0"; @@ -83,25 +108,6 @@ status = "okay"; }; -&avb { - pinctrl-0 = <&avb_pins>; - pinctrl-names = "default"; - - phy-handle = <&phy3>; - phy-mode = "gmii"; - renesas,no-ether-link; - status = "okay"; - - phy3: ethernet-phy@3 { - /* - * On some older versions of the platform (before R4.0) the phy address - * may be 1 or 3. The address is fixed to 3 for R4.0 onwards. - */ - reg = <3>; - micrel,led-mode = <1>; - }; -}; - &sdhi0 { pinctrl-0 = <&sdhi0_pins>; pinctrl-names = "default"; @@ -112,12 +118,6 @@ status = "okay"; }; -&pci1 { - status = "okay"; - pinctrl-0 = <&usb1_pins>; - pinctrl-names = "default"; -}; - &usbphy { status = "okay"; };