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[2/2] ARM: dts: r8a7743: Add xhci support to SoC dtsi

Message ID 1508148769-47488-3-git-send-email-biju.das@bp.renesas.com (mailing list archive)
State Accepted
Commit b6d3b649441936621c87b79bff8dd436e2397e3c
Delegated to: Simon Horman
Headers show

Commit Message

Biju Das Oct. 16, 2017, 10:12 a.m. UTC
From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>

Add node for xhci. Boards DT files will enable it if needed.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
---
 arch/arm/boot/dts/r8a7743.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

Comments

Yoshihiro Shimoda Oct. 17, 2017, 1:39 a.m. UTC | #1
Hi Biju-san,

IIUC, when we submitted a patch for dts[i] file,
we don't need to submit such a patch to usb maintainers.

> From: Biju Das, Sent: Monday, October 16, 2017 7:13 PM
> 
> From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> 
> Add node for xhci. Boards DT files will enable it if needed.
> 
> Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> ---
>  arch/arm/boot/dts/r8a7743.dtsi | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
> index 699c040..386bf07 100644
> --- a/arch/arm/boot/dts/r8a7743.dtsi
> +++ b/arch/arm/boot/dts/r8a7743.dtsi
> @@ -931,6 +931,26 @@
>  			status = "disabled";
>  		};
> 
> +		/*
> +		 * pci1 and xhci share the same phy, therefore only one of them
> +		 * can be active at any one time. If both of them are enabled,
> +		 * a race condition will determine who'll control the phy.
> +		 * A firmware file is needed by the xhci driver in order for
> +		 * USB 3.0 to work properly.
> +		 */
> +		xhci: usb@ee000000 {
> +			compatible = "renesas,xhci-r8a7743",
> +				     "renesas,rcar-gen2-xhci";
> +			reg = <0 0xee000000 0 0xc00>;
> +			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cpg CPG_MOD 328>;
> +			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
> +			resets = <&cpg 328>;
> +			phys = <&usb2 1>;
> +			phy-names = "usb";
> +			status = "disabled";
> +		};
> +
>  		sdhi0: sd@ee100000 {
>  			compatible = "renesas,sdhi-r8a7743";
>  			reg = <0 0xee100000 0 0x328>;

It seems good to me. So,

Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

Best regards,
Yoshihiro Shimoda

> --
> 1.9.1
Biju Das Oct. 17, 2017, 8:27 a.m. UTC | #2
Hi Shimoda-San,


> Hi Biju-san,
>
> IIUC, when we submitted a patch for dts[i] file, we don't need to submit such a
> patch to usb maintainers.

Thanks. I will take care this in future.

Regards,
Biju



Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
Simon Horman Oct. 18, 2017, 5:22 a.m. UTC | #3
On Tue, Oct 17, 2017 at 01:39:33AM +0000, Yoshihiro Shimoda wrote:
> Hi Biju-san,
> 
> IIUC, when we submitted a patch for dts[i] file,
> we don't need to submit such a patch to usb maintainers.
> 
> > From: Biju Das, Sent: Monday, October 16, 2017 7:13 PM
> > 
> > From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> > 
> > Add node for xhci. Boards DT files will enable it if needed.
> > 
> > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> > ---
> >  arch/arm/boot/dts/r8a7743.dtsi | 20 ++++++++++++++++++++
> >  1 file changed, 20 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
> > index 699c040..386bf07 100644
> > --- a/arch/arm/boot/dts/r8a7743.dtsi
> > +++ b/arch/arm/boot/dts/r8a7743.dtsi
> > @@ -931,6 +931,26 @@
> >  			status = "disabled";
> >  		};
> > 
> > +		/*
> > +		 * pci1 and xhci share the same phy, therefore only one of them
> > +		 * can be active at any one time. If both of them are enabled,
> > +		 * a race condition will determine who'll control the phy.
> > +		 * A firmware file is needed by the xhci driver in order for
> > +		 * USB 3.0 to work properly.
> > +		 */
> > +		xhci: usb@ee000000 {
> > +			compatible = "renesas,xhci-r8a7743",
> > +				     "renesas,rcar-gen2-xhci";
> > +			reg = <0 0xee000000 0 0xc00>;
> > +			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
> > +			clocks = <&cpg CPG_MOD 328>;
> > +			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
> > +			resets = <&cpg 328>;
> > +			phys = <&usb2 1>;
> > +			phy-names = "usb";
> > +			status = "disabled";
> > +		};
> > +
> >  		sdhi0: sd@ee100000 {
> >  			compatible = "renesas,sdhi-r8a7743";
> >  			reg = <0 0xee100000 0 0x328>;
> 
> It seems good to me. So,
> 
> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

Thanks, applied.
diff mbox

Patch

diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 699c040..386bf07 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -931,6 +931,26 @@ 
 			status = "disabled";
 		};
 
+		/*
+		 * pci1 and xhci share the same phy, therefore only one of them
+		 * can be active at any one time. If both of them are enabled,
+		 * a race condition will determine who'll control the phy.
+		 * A firmware file is needed by the xhci driver in order for
+		 * USB 3.0 to work properly.
+		 */
+		xhci: usb@ee000000 {
+			compatible = "renesas,xhci-r8a7743",
+				     "renesas,rcar-gen2-xhci";
+			reg = <0 0xee000000 0 0xc00>;
+			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 328>;
+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+			resets = <&cpg 328>;
+			phys = <&usb2 1>;
+			phy-names = "usb";
+			status = "disabled";
+		};
+
 		sdhi0: sd@ee100000 {
 			compatible = "renesas,sdhi-r8a7743";
 			reg = <0 0xee100000 0 0x328>;