From patchwork Mon Oct 16 15:27:55 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 10008883 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id AA786601D5 for ; Mon, 16 Oct 2017 15:28:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9999E285ED for ; Mon, 16 Oct 2017 15:28:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8E37C28604; Mon, 16 Oct 2017 15:28:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 15E94285ED for ; Mon, 16 Oct 2017 15:28:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753771AbdJPP2J (ORCPT ); Mon, 16 Oct 2017 11:28:09 -0400 Received: from xavier.telenet-ops.be ([195.130.132.52]:41760 "EHLO xavier.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754094AbdJPP2D (ORCPT ); Mon, 16 Oct 2017 11:28:03 -0400 Received: from ayla.of.borg ([84.195.106.246]) by xavier.telenet-ops.be with bizsmtp id NFU01w01W5JzmfG01FU0p6; Mon, 16 Oct 2017 17:28:01 +0200 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.86_2) (envelope-from ) id 1e47JB-0001Je-Ia; Mon, 16 Oct 2017 17:28:01 +0200 Received: from geert by ramsan with local (Exim 4.86_2) (envelope-from ) id 1e47JB-0005Yb-Hc; Mon, 16 Oct 2017 17:28:01 +0200 From: Geert Uytterhoeven To: Laurent Pinchart , Linus Walleij Cc: =?UTF-8?q?Niklas=20S=C3=B6derlund?= , linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v2 10/14] pinctrl: sh-pfc: Add generic IOCTRL register description Date: Mon, 16 Oct 2017 17:27:55 +0200 Message-Id: <1508167679-21155-11-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1508167679-21155-1-git-send-email-geert+renesas@glider.be> References: <1508167679-21155-1-git-send-email-geert+renesas@glider.be> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a generic way to describe IOCTRL registers (for e.g. SD I/O voltage and time delay control), like is already done for config, drive, and bias registers. This makes the sh-pfc core code aware of these registers, which will ease introducing suspend/resume support later. Signed-off-by: Geert Uytterhoeven --- v2: - No changes. --- drivers/pinctrl/sh-pfc/sh_pfc.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h index 18fd878266297dc2..b9bb56c91b6fdaf3 100644 --- a/drivers/pinctrl/sh-pfc/sh_pfc.h +++ b/drivers/pinctrl/sh-pfc/sh_pfc.h @@ -159,6 +159,10 @@ struct pinmux_bias_reg { .pud = r2, \ .pins = +struct pinmux_ioctrl_reg { + u32 reg; +}; + struct pinmux_data_reg { u32 reg; u8 reg_width; @@ -251,6 +255,7 @@ struct sh_pfc_soc_info { const struct pinmux_cfg_reg *cfg_regs; const struct pinmux_drive_reg *drive_regs; const struct pinmux_bias_reg *bias_regs; + const struct pinmux_ioctrl_reg *ioctrl_regs; const struct pinmux_data_reg *data_regs; const u16 *pinmux_data;