From patchwork Mon Oct 30 16:07:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 10032875 X-Patchwork-Delegate: horms@verge.net.au Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3EEC860291 for ; Mon, 30 Oct 2017 16:07:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 26281223A6 for ; Mon, 30 Oct 2017 16:07:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2472326E54; Mon, 30 Oct 2017 16:07:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.4 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 89A51283C3 for ; Mon, 30 Oct 2017 16:07:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751475AbdJ3QHV (ORCPT ); Mon, 30 Oct 2017 12:07:21 -0400 Received: from baptiste.telenet-ops.be ([195.130.132.51]:59120 "EHLO baptiste.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751941AbdJ3QHV (ORCPT ); Mon, 30 Oct 2017 12:07:21 -0400 Received: from ayla.of.borg ([84.195.106.246]) by baptiste.telenet-ops.be with bizsmtp id Ts7K1w00L5JzmfG01s7K9N; Mon, 30 Oct 2017 17:07:19 +0100 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.86_2) (envelope-from ) id 1e9Cat-0006th-CT; Mon, 30 Oct 2017 17:07:19 +0100 Received: from geert by ramsan with local (Exim 4.86_2) (envelope-from ) id 1e9Cat-0006jG-5W; Mon, 30 Oct 2017 17:07:19 +0100 From: Geert Uytterhoeven To: Simon Horman , Magnus Damm Cc: linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Geert Uytterhoeven Subject: [PATCH 1/2] arm64: dts: renesas: r8a77970: Add secondary CA53 CPU core Date: Mon, 30 Oct 2017 17:07:12 +0100 Message-Id: <1509379633-25823-2-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1509379633-25823-1-git-send-email-geert+renesas@glider.be> References: <1509379633-25823-1-git-send-email-geert+renesas@glider.be> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a device node for the second Cortex-A53 CPU core on the Renesas R-Car V3M (r8a77970) SoC. Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a77970.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi index 75d09f1724f02c1d..583ebb4c5eac0bfe 100644 --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi @@ -37,6 +37,16 @@ enable-method = "psci"; }; + a53_1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <1>; + clocks = <&cpg CPG_CORE 0>; + power-domains = <&sysc 6>; + next-level-cache = <&L2_CA53>; + enable-method = "psci"; + }; + L2_CA53: cache-controller { compatible = "cache"; power-domains = <&sysc 21>;