From patchwork Mon Nov 13 17:43:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 10056485 X-Patchwork-Delegate: horms@verge.net.au Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4A426602A7 for ; Mon, 13 Nov 2017 17:44:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3AA9728F6D for ; Mon, 13 Nov 2017 17:44:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2F4BE290CA; Mon, 13 Nov 2017 17:44:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AB32328F6D for ; Mon, 13 Nov 2017 17:44:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754228AbdKMRoh (ORCPT ); Mon, 13 Nov 2017 12:44:37 -0500 Received: from relmlor2.renesas.com ([210.160.252.172]:24915 "EHLO relmlie1.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754205AbdKMRog (ORCPT ); Mon, 13 Nov 2017 12:44:36 -0500 Received: from unknown (HELO relmlir1.idc.renesas.com) ([10.200.68.151]) by relmlie1.idc.renesas.com with ESMTP; 14 Nov 2017 02:44:34 +0900 Received: from relmlii2.idc.renesas.com (relmlii2.idc.renesas.com [10.200.68.66]) by relmlir1.idc.renesas.com (Postfix) with ESMTP id 09E5543D1F; Tue, 14 Nov 2017 02:44:35 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.44,389,1505746800"; d="scan'208";a="263351843" Received: from unknown (HELO be1yocto.ree.adwin.renesas.com) ([172.29.43.62]) by relmlii2.idc.renesas.com with ESMTP; 14 Nov 2017 02:44:32 +0900 From: Biju Das To: Rob Herring , Mark Rutland Cc: Simon Horman , Magnus Damm , Chris Paterson , Fabrizio Castro , devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Biju Das Subject: [PATCH 1/3] ARM: dts: r8a7743: Add default PCIe bus clock Date: Mon, 13 Nov 2017 17:43:10 +0000 Message-Id: <1510594992-63806-2-git-send-email-biju.das@bp.renesas.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1510594992-63806-1-git-send-email-biju.das@bp.renesas.com> References: <1510594992-63806-1-git-send-email-biju.das@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds a default PCIe bus clock node. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro --- This patch has dependency on below patch * ARM: dts: r8a7743: Add CAN[01] SoC support https://patchwork.kernel.org/patch/10046875/ arch/arm/boot/dts/r8a7743.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi index 12c7b92..de4b8c6 100644 --- a/arch/arm/boot/dts/r8a7743.dtsi +++ b/arch/arm/boot/dts/r8a7743.dtsi @@ -1189,6 +1189,13 @@ clock-frequency = <0>; }; + /* External PCIe clock - can be overridden by the board */ + pcie_bus_clk: pcie_bus { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + /* External SCIF clock */ scif_clk: scif { compatible = "fixed-clock";