diff mbox

[2/2] ARM: dts: r8a7745: Add VSP support

Message ID 1516810312-2100-3-git-send-email-biju.das@bp.renesas.com (mailing list archive)
State Accepted
Commit 76a2577d97f0b221245e56a17a70bb10a3a97419
Delegated to: Simon Horman
Headers show

Commit Message

Biju Das Jan. 24, 2018, 4:11 p.m. UTC 
Add VSP support to SoC DT.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
---
 arch/arm/boot/dts/r8a7745.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

Comments

Simon Horman Jan. 30, 2018, 9:56 a.m. UTC | #1 
On Wed, Jan 24, 2018 at 04:11:52PM +0000, Biju Das wrote:
> Add VSP support to SoC DT.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>

Thanks, applied manually - there was some fuzz, most likely due to recent
sorting of the nodes in this file.
diff mbox

Patch

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index a9da80c..ddc3da2 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -958,6 +958,24 @@ 
 			status = "disabled";
 		};
 
+		vsp@fe928000 {
+			compatible = "renesas,vsp1";
+			reg = <0 0xfe928000 0 0x8000>;
+			interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 131>;
+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+			resets = <&cpg 131>;
+		};
+
+		vsp@fe930000 {
+			compatible = "renesas,vsp1";
+			reg = <0 0xfe930000 0 0x8000>;
+			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 128>;
+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+			resets = <&cpg 128>;
+		};
+
 		du: display@feb00000 {
 			compatible = "renesas,du-r8a7745";
 			reg = <0 0xfeb00000 0 0x40000>;