| Message ID | 1518474330-8713-5-git-send-email-kbingham@kernel.org (mailing list archive) |
|---|---|
| State | Changes Requested |
| Delegated to: | Simon Horman |
| Headers | show |
Hi Kieran, Thank you for the patch. On Tuesday, 13 February 2018 00:25:29 EET Kieran Bingham wrote: > From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> > > The r8a77995 has two VSPDs to handle display pipelines with a DU. > > Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> > --- > arch/arm64/boot/dts/renesas/r8a77995.dtsi | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi > b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index > 50c891f6649f..2c14a8dfd201 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi > @@ -711,6 +711,16 @@ > iommus = <&ipmmu_vp0 5>; > }; > > + vspd0: vsp@fea20000 { > + compatible = "renesas,vsp2"; > + reg = <0 0xfea20000 0 0x4000>; Same issue as in patch 3/4 (for which I have incorrectly mentioned VSPD instead of VSPBS). I'd just extend the region size to 0x8000 for both VSPDs. Apart from that, Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > + interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 623>; > + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; > + resets = <&cpg 623>; > + renesas,fcp = <&fcpvd0>; > + }; > + > fcpvd0: fcp@fea27000 { > compatible = "renesas,fcpv"; > reg = <0 0xfea27000 0 0x200>; > @@ -720,6 +730,16 @@ > iommus = <&ipmmu_vi0 8>; > }; > > + vspd1: vsp@fea80000 { > + compatible = "renesas,vsp2"; > + reg = <0 0xfea28000 0 0x4000>; > + interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 622>; > + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; > + resets = <&cpg 622>; > + renesas,fcp = <&fcpvd1>; > + }; > + > fcpvd1: fcp@fea2f000 { > compatible = "renesas,fcpv"; > reg = <0 0xfea2f000 0 0x200>;
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index 50c891f6649f..2c14a8dfd201 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -711,6 +711,16 @@ iommus = <&ipmmu_vp0 5>; }; + vspd0: vsp@fea20000 { + compatible = "renesas,vsp2"; + reg = <0 0xfea20000 0 0x4000>; + interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 623>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 623>; + renesas,fcp = <&fcpvd0>; + }; + fcpvd0: fcp@fea27000 { compatible = "renesas,fcpv"; reg = <0 0xfea27000 0 0x200>; @@ -720,6 +730,16 @@ iommus = <&ipmmu_vi0 8>; }; + vspd1: vsp@fea80000 { + compatible = "renesas,vsp2"; + reg = <0 0xfea28000 0 0x4000>; + interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 622>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 622>; + renesas,fcp = <&fcpvd1>; + }; + fcpvd1: fcp@fea2f000 { compatible = "renesas,fcpv"; reg = <0 0xfea2f000 0 0x200>;