From patchwork Thu Mar 29 07:47:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michel Pollet X-Patchwork-Id: 10314609 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5131B60353 for ; Thu, 29 Mar 2018 07:52:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 47E012A274 for ; Thu, 29 Mar 2018 07:52:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3C0C22A276; Thu, 29 Mar 2018 07:52:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A275E2A274 for ; Thu, 29 Mar 2018 07:52:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752414AbeC2HwD (ORCPT ); Thu, 29 Mar 2018 03:52:03 -0400 Received: from relmlor3.renesas.com ([210.160.252.173]:38405 "EHLO relmlie2.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751927AbeC2HwB (ORCPT ); Thu, 29 Mar 2018 03:52:01 -0400 Received: from unknown (HELO relmlir1.idc.renesas.com) ([10.200.68.151]) by relmlie2.idc.renesas.com with ESMTP; 29 Mar 2018 16:51:59 +0900 Received: from relmlii2.idc.renesas.com (relmlii2.idc.renesas.com [10.200.68.66]) by relmlir1.idc.renesas.com (Postfix) with ESMTP id C97B88D669; Thu, 29 Mar 2018 16:51:59 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.48,375,1517842800"; d="scan'208";a="276602266" Received: from unknown (HELO be1yocto.ree.adwin.renesas.com) ([172.29.43.62]) by relmlii2.idc.renesas.com with ESMTP; 29 Mar 2018 16:51:56 +0900 From: Michel Pollet To: linux-renesas-soc@vger.kernel.org, Simon Horman Cc: phil.edworthy@renesas.com, Michel Pollet , Michel Pollet , Magnus Damm , Rob Herring , Mark Rutland , Lee Jones , Russell King , Sebastian Reichel , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH v3 4/8] reset: Renesas RZ/N1 reboot driver Date: Thu, 29 Mar 2018 08:47:00 +0100 Message-Id: <1522309629-10152-5-git-send-email-michel.pollet@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1522309629-10152-1-git-send-email-michel.pollet@bp.renesas.com> References: <1522309629-10152-1-git-send-email-michel.pollet@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The Renesas RZ/N1 Family (Part #R9A06G0xx) needs a small driver to reboot the Cortex-A7 cores. This driver is a sub driver of the sysctrl MFD. Signed-off-by: Michel Pollet --- drivers/power/reset/Kconfig | 7 +++ drivers/power/reset/Makefile | 1 + drivers/power/reset/rzn1-reboot.c | 105 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 113 insertions(+) create mode 100644 drivers/power/reset/rzn1-reboot.c diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig index df58fc8..1416d88 100644 --- a/drivers/power/reset/Kconfig +++ b/drivers/power/reset/Kconfig @@ -144,6 +144,13 @@ config POWER_RESET_RESTART Instead they restart, and u-boot holds the SoC until the user presses a key. u-boot then boots into Linux. +config POWER_RESET_RZN1 + bool "Renesas RZ/N1 reboot driver" + depends on ARCH_RZN1 + help + This driver allows rebooting the CA7 cores of the + Renesas RZ/N1 Family of SoC (Part # R9A06G0xx). + config POWER_RESET_ST bool "ST restart driver" depends on ARCH_STI diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile index 7778c74..bad9702 100644 --- a/drivers/power/reset/Makefile +++ b/drivers/power/reset/Makefile @@ -16,6 +16,7 @@ obj-$(CONFIG_POWER_RESET_PIIX4_POWEROFF) += piix4-poweroff.o obj-$(CONFIG_POWER_RESET_LTC2952) += ltc2952-poweroff.o obj-$(CONFIG_POWER_RESET_QNAP) += qnap-poweroff.o obj-$(CONFIG_POWER_RESET_RESTART) += restart-poweroff.o +obj-$(CONFIG_POWER_RESET_RZN1) += rzn1-reboot.o obj-$(CONFIG_POWER_RESET_ST) += st-poweroff.o obj-$(CONFIG_POWER_RESET_VERSATILE) += arm-versatile-reboot.o obj-$(CONFIG_POWER_RESET_VEXPRESS) += vexpress-poweroff.o diff --git a/drivers/power/reset/rzn1-reboot.c b/drivers/power/reset/rzn1-reboot.c new file mode 100644 index 0000000..54fdd81 --- /dev/null +++ b/drivers/power/reset/rzn1-reboot.c @@ -0,0 +1,105 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * RZ/N1 reboot driver + * + * Copyright (C) 2018 Renesas Electronics Europe Limited + * + * Michel Pollet , + * Derived from zx-reboot.c + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +/* Definitions from the SDK rzn1-sysctrl.h autogenerated file */ +#define RZN1_SYSCTRL_REG_RSTEN 0x120 +#define RZN1_SYSCTRL_REG_RSTEN_MRESET_EN 0 +#define RZN1_SYSCTRL_REG_RSTEN_WDA7RST_EN 1 +#define RZN1_SYSCTRL_REG_RSTEN_WDA7RST_EN_MASK 0x6 +#define RZN1_SYSCTRL_REG_RSTEN_WDM3RST_EN 3 +#define RZN1_SYSCTRL_REG_RSTEN_CM3LOCKUPRST_EN 4 +#define RZN1_SYSCTRL_REG_RSTEN_CM3SYSRESET_EN 5 +#define RZN1_SYSCTRL_REG_RSTEN_SWRST_EN 6 +#define RZN1_SYSCTRL_REG_RSTCTRL 0x198 +#define RZN1_SYSCTRL_REG_RSTCTRL_WDA7RST_REQ 1 +#define RZN1_SYSCTRL_REG_RSTCTRL_WDA7RST_REQ_MASK 0x6 +#define RZN1_SYSCTRL_REG_RSTCTRL_WDM3RST_REQ 3 +#define RZN1_SYSCTRL_REG_RSTCTRL_CM3LOCKUPRST_REQ 4 +#define RZN1_SYSCTRL_REG_RSTCTRL_CM3SYSRESET_REQ 5 +#define RZN1_SYSCTRL_REG_RSTCTRL_SWRST_REQ 6 + +static struct regmap *sysctrl; + +static int rzn1_reboot_handler(struct notifier_block *this, + unsigned long mode, void *cmd) +{ + regmap_write_bits(sysctrl, + RZN1_SYSCTRL_REG_RSTEN, + BIT(RZN1_SYSCTRL_REG_RSTEN_SWRST_EN) | + BIT(RZN1_SYSCTRL_REG_RSTEN_MRESET_EN), + BIT(RZN1_SYSCTRL_REG_RSTEN_SWRST_EN) | + BIT(RZN1_SYSCTRL_REG_RSTEN_MRESET_EN)); + regmap_write_bits(sysctrl, + RZN1_SYSCTRL_REG_RSTCTRL, + BIT(RZN1_SYSCTRL_REG_RSTCTRL_SWRST_REQ), + BIT(RZN1_SYSCTRL_REG_RSTCTRL_SWRST_REQ)); + + mdelay(50); + pr_emerg("Unable to restart system\n"); + + return NOTIFY_DONE; +} + +static struct notifier_block rzn1_reboot_nb = { + .notifier_call = rzn1_reboot_handler, + .priority = 128, +}; + +static int rzn1_reboot_probe(struct platform_device *pdev) +{ + int err; + struct device *parent; + + parent = pdev->dev.parent; + if (!parent || !parent->of_node) + dev_err(&pdev->dev, "couldn't find sysctrl node\n"); + return -ENODEV; + } + sysctrl = syscon_node_to_regmap(parent->of_node); + if (IS_ERR(sysctrl)) { + dev_err(&pdev->dev, "couldn't find find regmap\n"); + return PTR_ERR(sysctrl); + } + err = register_restart_handler(&rzn1_reboot_nb); + if (err) { + dev_err(&pdev->dev, "register restart handler failed(err=%d)\n", + err); + } + + return err; +} + +static const struct of_device_id rzn1_reboot_of_match[] = { + { .compatible = "renesas,rzn1-reboot" }, + {} +}; +MODULE_DEVICE_TABLE(of, rzn1_reboot_of_match); + +static struct platform_driver rzn1_reboot_driver = { + .probe = rzn1_reboot_probe, + .driver = { + .name = "rzn1-reboot", + .of_match_table = rzn1_reboot_of_match, + }, +}; +module_platform_driver(rzn1_reboot_driver); + +MODULE_DESCRIPTION("RZ/N1 reboot driver"); +MODULE_AUTHOR("Michel Pollet , "); +MODULE_LICENSE("GPL v2");