@@ -18,9 +18,11 @@
#address-cells = <2>;
#size-cells = <2>;
- psci {
- compatible = "arm,psci-1.0", "arm,psci-0.2";
- method = "smc";
+ /* External CAN clock - to be overridden by boards that provide it */
+ can_clk: can {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
};
cpus {
@@ -51,18 +53,16 @@
clock-frequency = <0>;
};
- /* External CAN clock - to be overridden by boards that provide it */
- can_clk: can {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
pmu_a53 {
compatible = "arm,cortex-a53-pmu";
interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
};
+ psci {
+ compatible = "arm,psci-1.0", "arm,psci-0.2";
+ method = "smc";
+ };
+
scif_clk: scif {
compatible = "fixed-clock";
#clock-cells = <0>;
Sort subnodes of the root node alphanumerically. This is part of an ongoing effort to provide consistent node order in the DT of Renesas SoCs to improve maintainability. This should not have any run-time effect. Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> --- arch/arm64/boot/dts/renesas/r8a77995.dtsi | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-)