diff mbox

[1/2] arm64: dts: r8a77995: Add MSIOF device nodes

Message ID 1526475916-13705-1-git-send-email-ulrich.hecht+renesas@gmail.com (mailing list archive)
State Superseded
Headers show

Commit Message

Ulrich Hecht May 16, 2018, 1:05 p.m. UTC
From: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>

This patch adds MSIOF device nodes for the R8A77995 SoC.

Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[uli: remove unimplemented ref clock]
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
---
 arch/arm64/boot/dts/renesas/r8a77995.dtsi | 66 +++++++++++++++++++++++++++++++
 1 file changed, 66 insertions(+)

Comments

Geert Uytterhoeven May 16, 2018, 5:43 p.m. UTC | #1
Hi Uli,

On Wed, May 16, 2018 at 3:05 PM, Ulrich Hecht
<ulrich.hecht+renesas@gmail.com> wrote:
> From: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
>
> This patch adds MSIOF device nodes for the R8A77995 SoC.
>
> Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> [uli: remove unimplemented ref clock]

I think you should remove the clock-names properties, too.

> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
> ---
>  arch/arm64/boot/dts/renesas/r8a77995.dtsi | 66 +++++++++++++++++++++++++++++++
>  1 file changed, 66 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> index 2506f46..2f712ac 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> @@ -783,6 +783,72 @@
>                         compatible = "renesas,prr";
>                         reg = <0 0xfff00044 0 4>;
>                 };
> +
> +               msiof0: spi@e6e90000 {
> +                       compatible = "renesas,msiof-r8a77995",
> +                                    "renesas,rcar-gen3-msiof";
> +                       reg = <0 0xe6e90000 0 0x0064>;
> +                       interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&cpg CPG_MOD 211>;
> +                       clock-names = "msiof_clk";
> +                       dmas = <&dmac1 0x41>, <&dmac1 0x40>,
> +                              <&dmac2 0x41>, <&dmac2 0x40>;
> +                       dma-names = "tx", "rx", "tx", "rx";
> +                       power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
> +                       resets = <&cpg 211>;
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       status = "disabled";
> +               };

Gr{oetje,eeting}s,

                        Geert
Simon Horman May 17, 2018, 7:52 a.m. UTC | #2
On Wed, May 16, 2018 at 07:43:29PM +0200, Geert Uytterhoeven wrote:
> Hi Uli,
> 
> On Wed, May 16, 2018 at 3:05 PM, Ulrich Hecht
> <ulrich.hecht+renesas@gmail.com> wrote:
> > From: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
> >
> > This patch adds MSIOF device nodes for the R8A77995 SoC.
> >
> > Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
> > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> > [uli: remove unimplemented ref clock]
> 
> I think you should remove the clock-names properties, too.
> 
> > Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
> > ---
> >  arch/arm64/boot/dts/renesas/r8a77995.dtsi | 66 +++++++++++++++++++++++++++++++
> >  1 file changed, 66 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> > index 2506f46..2f712ac 100644
> > --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> > @@ -783,6 +783,72 @@
> >                         compatible = "renesas,prr";
> >                         reg = <0 0xfff00044 0 4>;
> >                 };
> > +
> > +               msiof0: spi@e6e90000 {
> > +                       compatible = "renesas,msiof-r8a77995",
> > +                                    "renesas,rcar-gen3-msiof";
> > +                       reg = <0 0xe6e90000 0 0x0064>;

minor nit: s/0x0064/0x64/

Ulrich, could you consider reposing with the feedback from Geert and the
minor nit above addressed?

> > +                       interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
> > +                       clocks = <&cpg CPG_MOD 211>;
> > +                       clock-names = "msiof_clk";
> > +                       dmas = <&dmac1 0x41>, <&dmac1 0x40>,
> > +                              <&dmac2 0x41>, <&dmac2 0x40>;
> > +                       dma-names = "tx", "rx", "tx", "rx";
> > +                       power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
> > +                       resets = <&cpg 211>;
> > +                       #address-cells = <1>;
> > +                       #size-cells = <0>;
> > +                       status = "disabled";
> > +               };
> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> -- 
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds
>
Wolfram Sang May 17, 2018, 7:56 a.m. UTC | #3
On Wed, May 16, 2018 at 03:05:15PM +0200, Ulrich Hecht wrote:
> From: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
> 
> This patch adds MSIOF device nodes for the R8A77995 SoC.
> 
> Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> [uli: remove unimplemented ref clock]
> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>

Thanks, Uli!

For the record: can you describe shortly which of these got tested with
what setup? I don't know the Draak, so I don't know what is exposed.
Ulrich Hecht May 23, 2018, 9:01 a.m. UTC | #4
On Thu, May 17, 2018 at 9:56 AM, Wolfram Sang <wsa@the-dreams.de> wrote:
> On Wed, May 16, 2018 at 03:05:15PM +0200, Ulrich Hecht wrote:
>> From: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
>>
>> This patch adds MSIOF device nodes for the R8A77995 SoC.
>>
>> Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
>> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
>> [uli: remove unimplemented ref clock]
>> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
>
> Thanks, Uli!
>
> For the record: can you describe shortly which of these got tested with
> what setup? I don't know the Draak, so I don't know what is exposed.

MSIOF2 is conveniently hooked up to a 1x4 pin header (CN41), no
weird-ass Samtec connectors required. My testing covered sending some
data using spidev_test and watching the output on an oscilloscope
attached to MSIOF2_TXD (pin 3). Looks plausible.

CU
Uli
Wolfram Sang May 23, 2018, 9:11 a.m. UTC | #5
> > For the record: can you describe shortly which of these got tested with
> > what setup? I don't know the Draak, so I don't know what is exposed.
> 
> MSIOF2 is conveniently hooked up to a 1x4 pin header (CN41), no
> weird-ass Samtec connectors required. My testing covered sending some
> data using spidev_test and watching the output on an oscilloscope
> attached to MSIOF2_TXD (pin 3). Looks plausible.

Perfect, thanks!
Wolfram Sang June 20, 2018, 5:50 a.m. UTC | #6
On Thu, May 17, 2018 at 09:52:33AM +0200, Simon Horman wrote:
> On Wed, May 16, 2018 at 07:43:29PM +0200, Geert Uytterhoeven wrote:
> > Hi Uli,
> > 
> > On Wed, May 16, 2018 at 3:05 PM, Ulrich Hecht
> > <ulrich.hecht+renesas@gmail.com> wrote:
> > > From: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
> > >
> > > This patch adds MSIOF device nodes for the R8A77995 SoC.
> > >
> > > Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
> > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> > > [uli: remove unimplemented ref clock]
> > 
> > I think you should remove the clock-names properties, too.
> > 
> > > Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
> > > ---
> > >  arch/arm64/boot/dts/renesas/r8a77995.dtsi | 66 +++++++++++++++++++++++++++++++
> > >  1 file changed, 66 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> > > index 2506f46..2f712ac 100644
> > > --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> > > +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> > > @@ -783,6 +783,72 @@
> > >                         compatible = "renesas,prr";
> > >                         reg = <0 0xfff00044 0 4>;
> > >                 };
> > > +
> > > +               msiof0: spi@e6e90000 {
> > > +                       compatible = "renesas,msiof-r8a77995",
> > > +                                    "renesas,rcar-gen3-msiof";
> > > +                       reg = <0 0xe6e90000 0 0x0064>;
> 
> minor nit: s/0x0064/0x64/
> 
> Ulrich, could you consider reposing with the feedback from Geert and the
> minor nit above addressed?

Ulrich, ping for this series.
diff mbox

Patch

diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 2506f46..2f712ac 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -783,6 +783,72 @@ 
 			compatible = "renesas,prr";
 			reg = <0 0xfff00044 0 4>;
 		};
+
+		msiof0: spi@e6e90000 {
+			compatible = "renesas,msiof-r8a77995",
+				     "renesas,rcar-gen3-msiof";
+			reg = <0 0xe6e90000 0 0x0064>;
+			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 211>;
+			clock-names = "msiof_clk";
+			dmas = <&dmac1 0x41>, <&dmac1 0x40>,
+			       <&dmac2 0x41>, <&dmac2 0x40>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+			resets = <&cpg 211>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		msiof1: spi@e6ea0000 {
+			compatible = "renesas,msiof-r8a77995",
+				     "renesas,rcar-gen3-msiof";
+			reg = <0 0xe6ea0000 0 0x0064>;
+			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 210>;
+			clock-names = "msiof_clk";
+			dmas = <&dmac1 0x43>, <&dmac1 0x42>,
+			       <&dmac2 0x43>, <&dmac2 0x42>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+			resets = <&cpg 210>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		msiof2: spi@e6c00000 {
+			compatible = "renesas,msiof-r8a77995",
+				     "renesas,rcar-gen3-msiof";
+			reg = <0 0xe6c00000 0 0x0064>;
+			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 209>;
+			clock-names = "msiof_clk";
+			dmas = <&dmac0 0x45>, <&dmac0 0x44>;
+			dma-names = "tx", "rx";
+			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+			resets = <&cpg 209>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		msiof3: spi@e6c10000 {
+			compatible = "renesas,msiof-r8a77995",
+				     "renesas,rcar-gen3-msiof";
+			reg = <0 0xe6c10000 0 0x0064>;
+			interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 208>;
+			clock-names = "msiof_clk";
+			dmas = <&dmac0 0x47>, <&dmac0 0x46>;
+			dma-names = "tx", "rx";
+			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+			resets = <&cpg 208>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
 	};
 
 	timer {