From patchwork Thu May 24 10:39:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michel Pollet X-Patchwork-Id: 10423999 X-Patchwork-Delegate: horms@verge.net.au Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A11B560545 for ; Thu, 24 May 2018 10:45:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9B2312932F for ; Thu, 24 May 2018 10:45:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8F65229332; Thu, 24 May 2018 10:45:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 34C9D29330 for ; Thu, 24 May 2018 10:45:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1032400AbeEXKou (ORCPT ); Thu, 24 May 2018 06:44:50 -0400 Received: from relmlor3.renesas.com ([210.160.252.173]:27334 "EHLO relmlie2.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1032394AbeEXKoo (ORCPT ); Thu, 24 May 2018 06:44:44 -0400 Received: from unknown (HELO relmlir4.idc.renesas.com) ([10.200.68.154]) by relmlie2.idc.renesas.com with ESMTP; 24 May 2018 19:44:42 +0900 Received: from relmlii2.idc.renesas.com (relmlii2.idc.renesas.com [10.200.68.66]) by relmlir4.idc.renesas.com (Postfix) with ESMTP id 0301762160; Thu, 24 May 2018 19:44:43 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.49,436,1520866800"; d="scan'208";a="281947096" Received: from unknown (HELO be1yocto.ree.adwin.renesas.com) ([172.29.43.62]) by relmlii2.idc.renesas.com with ESMTP; 24 May 2018 19:44:38 +0900 From: Michel Pollet To: linux-renesas-soc@vger.kernel.org, Simon Horman Cc: phil.edworthy@renesas.com, Michel Pollet , Michel Pollet , Rob Herring , Mark Rutland , Magnus Damm , Russell King , Florian Fainelli , Martin Blumenstingl , Greg Kroah-Hartman , Stefan Wahren , Rajendra Nayak , Carlo Caione , Chen-Yu Tsai , Frank Rowand , Juri Lelli , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 3/3] ARM: dts: Renesas R9A06G032 SMP enable method Date: Thu, 24 May 2018 11:39:51 +0100 Message-Id: <1527158396-22350-4-git-send-email-michel.pollet@bp.renesas.com> X-Mailer: git-send-email 2.7.4 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a special enable method for the second CA7 of the R9A06G032 as well as the default value for the "cpu-release-addr" property. Signed-off-by: Michel Pollet --- arch/arm/boot/dts/r9a06g032.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 9534f1b..d7b5414 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -30,6 +30,8 @@ compatible = "arm,cortex-a7"; reg = <1>; clocks = <&sysctrl R9A06G032_DIV_CA7>; + enable-method = "renesas,r9a06g032-smp"; + cpu-release-addr = <0x4000c204>; }; };