| Message ID | 1537530804-19399-6-git-send-email-yoshihiro.shimoda.uh@renesas.com (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | phy: renesas: rcar-gen3-usb2: re-design for all R-Car Gen3 SoCs | expand |
On Fri, Sep 21, 2018 at 08:53:21PM +0900, Yoshihiro Shimoda wrote: > This patch unifies the OBINTEN handling to clean-up the code. > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> The nit below notwithstanding. Reviewed-by: Simon Horman <horms+renesas@verge.net.au> > --- > drivers/phy/renesas/phy-rcar-gen3-usb2.c | 23 +++++++++++++++-------- > 1 file changed, 15 insertions(+), 8 deletions(-) > > diff --git a/drivers/phy/renesas/phy-rcar-gen3-usb2.c b/drivers/phy/renesas/phy-rcar-gen3-usb2.c > index 856056e..e7eaed9 100644 > --- a/drivers/phy/renesas/phy-rcar-gen3-usb2.c > +++ b/drivers/phy/renesas/phy-rcar-gen3-usb2.c > @@ -142,6 +142,18 @@ static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus) > writel(val, usb2_base + USB2_ADPCTRL); > } > > +static void rcar_gen3_control_otg_irq(struct rcar_gen3_chan *ch, int enable) > +{ nit: Perhaps bool would be a better type for the enable parameter. > + void __iomem *usb2_base = ch->base; > + u32 val = readl(usb2_base + USB2_OBINTEN); > + > + if (enable) > + val |= USB2_OBINT_BITS; > + else > + val &= ~USB2_OBINT_BITS; > + writel(val, usb2_base + USB2_OBINTEN); > +} > + > static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch) > { > rcar_gen3_set_linectrl(ch, 1, 1); > @@ -187,16 +199,12 @@ static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch) > > static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch) > { > - void __iomem *usb2_base = ch->base; > - u32 val; > - > - val = readl(usb2_base + USB2_OBINTEN); > - writel(val & ~USB2_OBINT_BITS, usb2_base + USB2_OBINTEN); > + rcar_gen3_control_otg_irq(ch, 0); > > rcar_gen3_enable_vbus_ctrl(ch, 1); > rcar_gen3_init_for_host(ch); > > - writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN); > + rcar_gen3_control_otg_irq(ch, 1); > } > > static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch) > @@ -286,8 +294,7 @@ static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch) > val = readl(usb2_base + USB2_VBCTRL); > writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL); > writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA); > - val = readl(usb2_base + USB2_OBINTEN); > - writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN); > + rcar_gen3_control_otg_irq(ch, 1); > val = readl(usb2_base + USB2_ADPCTRL); > writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL); > val = readl(usb2_base + USB2_LINECTRL1); > -- > 1.9.1 >
diff --git a/drivers/phy/renesas/phy-rcar-gen3-usb2.c b/drivers/phy/renesas/phy-rcar-gen3-usb2.c index 856056e..e7eaed9 100644 --- a/drivers/phy/renesas/phy-rcar-gen3-usb2.c +++ b/drivers/phy/renesas/phy-rcar-gen3-usb2.c @@ -142,6 +142,18 @@ static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus) writel(val, usb2_base + USB2_ADPCTRL); } +static void rcar_gen3_control_otg_irq(struct rcar_gen3_chan *ch, int enable) +{ + void __iomem *usb2_base = ch->base; + u32 val = readl(usb2_base + USB2_OBINTEN); + + if (enable) + val |= USB2_OBINT_BITS; + else + val &= ~USB2_OBINT_BITS; + writel(val, usb2_base + USB2_OBINTEN); +} + static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch) { rcar_gen3_set_linectrl(ch, 1, 1); @@ -187,16 +199,12 @@ static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch) static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch) { - void __iomem *usb2_base = ch->base; - u32 val; - - val = readl(usb2_base + USB2_OBINTEN); - writel(val & ~USB2_OBINT_BITS, usb2_base + USB2_OBINTEN); + rcar_gen3_control_otg_irq(ch, 0); rcar_gen3_enable_vbus_ctrl(ch, 1); rcar_gen3_init_for_host(ch); - writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN); + rcar_gen3_control_otg_irq(ch, 1); } static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch) @@ -286,8 +294,7 @@ static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch) val = readl(usb2_base + USB2_VBCTRL); writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL); writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA); - val = readl(usb2_base + USB2_OBINTEN); - writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN); + rcar_gen3_control_otg_irq(ch, 1); val = readl(usb2_base + USB2_ADPCTRL); writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL); val = readl(usb2_base + USB2_LINECTRL1);
This patch unifies the OBINTEN handling to clean-up the code. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> --- drivers/phy/renesas/phy-rcar-gen3-usb2.c | 23 +++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-)