From patchwork Thu Oct 25 13:56:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 10655853 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5541613A4 for ; Thu, 25 Oct 2018 14:04:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 43A752B977 for ; Thu, 25 Oct 2018 14:04:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 37B4B2BA39; Thu, 25 Oct 2018 14:04:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A7E642B977 for ; Thu, 25 Oct 2018 14:04:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727363AbeJYWhi (ORCPT ); Thu, 25 Oct 2018 18:37:38 -0400 Received: from relmlor4.renesas.com ([210.160.252.174]:12782 "EHLO relmlie3.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727475AbeJYWhi (ORCPT ); Thu, 25 Oct 2018 18:37:38 -0400 Received: from unknown (HELO relmlir2.idc.renesas.com) ([10.200.68.152]) by relmlie3.idc.renesas.com with ESMTP; 25 Oct 2018 23:04:43 +0900 Received: from relmlii2.idc.renesas.com (relmlii2.idc.renesas.com [10.200.68.66]) by relmlir2.idc.renesas.com (Postfix) with ESMTP id 2954E86A03; Thu, 25 Oct 2018 23:04:43 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.54,424,1534777200"; d="scan'208";a="296044153" Received: from unknown (HELO be1yocto.ree.adwin.renesas.com) ([172.29.43.62]) by relmlii2.idc.renesas.com with ESMTP; 25 Oct 2018 23:04:40 +0900 From: Biju Das To: Rob Herring , Mark Rutland Cc: Biju Das , devicetree@vger.kernel.org, Simon Horman , Geert Uytterhoeven , Chris Paterson , Fabrizio Castro , Yoshihiro Shimoda , linux-renesas-soc@vger.kernel.org Subject: [PATCH 1/7] dt-bindings: phy: rcar-gen2: Add r8a77470 support Date: Thu, 25 Oct 2018 14:56:53 +0100 Message-Id: <1540475819-47950-2-git-send-email-biju.das@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540475819-47950-1-git-send-email-biju.das@bp.renesas.com> References: <1540475819-47950-1-git-send-email-biju.das@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add USB PHY support for r8a77470 SoC. Renesas RZ/G1C (R8A77470) USB PHY is similar to the R-Car Gen2 family, but has the below features compared to other RZ/G1 and R-Car Gen2/3 SoCs It has a shared pll reset for usbphy0/usbphy1 and this register reside in usbphy0 block Each USB2.0 host needs to deassert the pll reset of usbphy0 block. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro --- .../devicetree/bindings/phy/rcar-gen2-phy.txt | 64 +++++++++++++++++++--- 1 file changed, 55 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt b/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt index eeb9e18..0a59971 100644 --- a/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt +++ b/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt @@ -6,6 +6,7 @@ This file provides information on what the device node for the R-Car generation Required properties: - compatible: "renesas,usb-phy-r8a7743" if the device is a part of R8A7743 SoC. "renesas,usb-phy-r8a7745" if the device is a part of R8A7745 SoC. + "renesas,usb-phy-r8a77470" if the device is a part of R8A77470 SoC. "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC. "renesas,usb-phy-r8a7791" if the device is a part of R8A7791 SoC. "renesas,usb-phy-r8a7794" if the device is a part of R8A7794 SoC. @@ -23,13 +24,23 @@ Required properties: - clocks: clock phandle and specifier pair. - clock-names: string, clock input name, must be "usbhs". +Optional properties (r8a77470 SoC Only): +To use a USB channel as USB 2.0 Host, the device tree node should set below +optional properties. This is because USB2.0 Host needs to deassert pll reset, +apart from initializing interrupt enable, OVC detection timer and suspend/ +resume timer register. + +- reg: offset and length of the partial USB2.0 Host register block. +- clocks: clock phandle and specifier pair for usb2.0 host. +- clk-names: string, clock input name, must be "usb20_host". + The USB PHY device tree node should have the subnodes corresponding to the USB channels. These subnodes must contain the following properties: - reg: the USB controller selector; see the table below for the values. - #phy-cells: see phy-bindings.txt in the same directory, must be <1>. The phandle's argument in the PHY specifier is the USB controller selector for -the USB channel; see the selector meanings below: +the USB channel other than r8a77470 SoC; see the selector meanings below: +-----------+---------------+---------------+ |\ Selector | | | @@ -40,22 +51,57 @@ the USB channel; see the selector meanings below: | 2 | PCI EHCI/OHCI | xHCI | +-----------+---------------+---------------+ +For r8a77470 SoC see the selector meaning below: + ++-----------+---------------+---------------+ +|\ Selector | | | ++ --------- + 0 | 1 | +| Channel \| | | ++-----------+---------------+---------------+ +| 0 | EHCI/OHCI | HS-USB | ++-----------+---------------+---------------+ + Example (Lager board): - usb-phy@e6590100 { - compatible = "renesas,usb-phy-r8a7790", "renesas,rcar-gen2-usb-phy"; + usbphy: usb-phy@e6590100 { + compatible = "renesas,usb-phy-r8a7790", + "renesas,rcar-gen2-usb-phy"; reg = <0 0xe6590100 0 0x100>; #address-cells = <1>; #size-cells = <0>; - clocks = <&mstp7_clks R8A7790_CLK_HSUSB>; + clocks = <&cpg CPG_MOD 704>; clock-names = "usbhs"; + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; + resets = <&cpg 704>; + status = "disabled"; - usb-channel@0 { - reg = <0>; - #phy-cells = <1>; + usb0: usb-channel@0 { + reg = <0>; + #phy-cells = <1>; + }; + usb2: usb-channel@2 { + reg = <2>; + #phy-cells = <1>; }; - usb-channel@2 { - reg = <2>; + }; + +Example (iWave RZ/G1C SBC): + + usbphy0: usb-phy0@e6590100 { + compatible = "renesas,usb-phy-r8a77470", + "renesas,rcar-gen2-usb-phy"; + reg = <0 0xe6590100 0 0x100>, + <0 0xee080200 0 0x118>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; + clock-names = "usbhs", "usb20_host"; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 704>, <&cpg 703>; + status = "disabled"; + + usb0: usb-channel@0 { + reg = <0>; #phy-cells = <1>; }; };