| Message ID | 1541696684-21235-3-git-send-email-fabrizio.castro@bp.renesas.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | b6239d4219643bd1ac1d0b5a0faedf69cd2a2bfa |
| Headers | show |
| Series | Add QSPI flash support to iwg23s | expand |
On Thu, Nov 08, 2018 at 05:04:42PM +0000, Fabrizio Castro wrote: > Add QSPI[01] support to the RZ/G1C SoC specific device tree. > > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Thanks, This looks fine to me but I will wait to see if there are other reviews before applying. Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
On Fri, Nov 09, 2018 at 11:05:56AM +0100, Simon Horman wrote: > On Thu, Nov 08, 2018 at 05:04:42PM +0000, Fabrizio Castro wrote: > > Add QSPI[01] support to the RZ/G1C SoC specific device tree. > > > > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > > Thanks, > > This looks fine to me but I will wait to see if there are other reviews > before applying. Thanks again, applied for v4.21.
diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi index 5c0e48d..f4e232b 100644 --- a/arch/arm/boot/dts/r8a77470.dtsi +++ b/arch/arm/boot/dts/r8a77470.dtsi @@ -460,6 +460,38 @@ status = "disabled"; }; + qspi0: spi@e6b10000 { + compatible = "renesas,qspi-r8a77470", "renesas,qspi"; + reg = <0 0xe6b10000 0 0x2c>; + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 918>; + dmas = <&dmac0 0x17>, <&dmac0 0x18>, + <&dmac1 0x17>, <&dmac1 0x18>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + resets = <&cpg 918>; + status = "disabled"; + }; + + qspi1: spi@ee200000 { + compatible = "renesas,qspi-r8a77470", "renesas,qspi"; + reg = <0 0xee200000 0 0x2c>; + interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 917>; + dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, + <&dmac1 0xd1>, <&dmac1 0xd2>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + resets = <&cpg 917>; + status = "disabled"; + }; + scif0: serial@e6e60000 { compatible = "renesas,scif-r8a77470", "renesas,rcar-gen2-scif", "renesas,scif";
Add QSPI[01] support to the RZ/G1C SoC specific device tree. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> --- v1->v2: * Removed aliases arch/arm/boot/dts/r8a77470.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+)