| Message ID | 1543319795-48325-19-git-send-email-biju.das@bp.renesas.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 0faadd5a410533d3a75601b607ee5a4110b754f4 |
| Delegated to: | Simon Horman |
| Headers | show |
| Series | Add more support to RZ/G1N | expand |
On Tue, Nov 27, 2018 at 1:05 PM Biju Das <biju.das@bp.renesas.com> wrote: > Add the DT node for the QSPI interface to the SoC dtsi. > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
On Fri, Nov 30, 2018 at 10:02:16AM +0100, Geert Uytterhoeven wrote: > On Tue, Nov 27, 2018 at 1:05 PM Biju Das <biju.das@bp.renesas.com> wrote: > > Add the DT node for the QSPI interface to the SoC dtsi. > > > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Thanks, applied for v4.21.
diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi index 39f309c..abe0ee3 100644 --- a/arch/arm/boot/dts/r8a7744.dtsi +++ b/arch/arm/boot/dts/r8a7744.dtsi @@ -649,6 +649,22 @@ status = "disabled"; }; + qspi: spi@e6b10000 { + compatible = "renesas,qspi-r8a7744", "renesas,qspi"; + reg = <0 0xe6b10000 0 0x2c>; + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 917>; + dmas = <&dmac0 0x17>, <&dmac0 0x18>, + <&dmac1 0x17>, <&dmac1 0x18>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + resets = <&cpg 917>; + status = "disabled"; + }; + scifa0: serial@e6c40000 { compatible = "renesas,scifa-r8a7744", "renesas,rcar-gen2-scifa", "renesas,scifa";
Add the DT node for the QSPI interface to the SoC dtsi. Signed-off-by: Biju Das <biju.das@bp.renesas.com> --- arch/arm/boot/dts/r8a7744.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)