From patchwork Mon Dec 3 09:18:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mason Yang X-Patchwork-Id: 10708953 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BEDE815A6 for ; Mon, 3 Dec 2018 09:19:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B188C2AB47 for ; Mon, 3 Dec 2018 09:19:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A59FE2AC3B; Mon, 3 Dec 2018 09:19:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5EAA62AB47 for ; Mon, 3 Dec 2018 09:19:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725945AbeLCJTe (ORCPT ); Mon, 3 Dec 2018 04:19:34 -0500 Received: from twhmllg3.macronix.com ([122.147.135.201]:45384 "EHLO TWHMLLG3.macronix.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725874AbeLCJTe (ORCPT ); Mon, 3 Dec 2018 04:19:34 -0500 Received: from localhost.localdomain ([172.17.195.96]) by TWHMLLG3.macronix.com with ESMTP id wB39IfJW078205; Mon, 3 Dec 2018 17:18:45 +0800 (GMT-8) (envelope-from masonccyang@mxic.com.tw) From: Mason Yang To: broonie@kernel.org, marek.vasut@gmail.com, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, boris.brezillon@bootlin.com, linux-renesas-soc@vger.kernel.org, Geert Uytterhoeven Cc: juliensu@mxic.com.tw, Simon Horman , zhengxunli@mxic.com.tw, Mason Yang Subject: [PATCH v2 2/2] dt-binding: spi: Document Renesas R-Car Gen3 RPC controller bindings Date: Mon, 3 Dec 2018 17:18:40 +0800 Message-Id: <1543828720-18345-3-git-send-email-masonccyang@mxic.com.tw> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1543828720-18345-1-git-send-email-masonccyang@mxic.com.tw> References: <1543828720-18345-1-git-send-email-masonccyang@mxic.com.tw> X-MAIL: TWHMLLG3.macronix.com wB39IfJW078205 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Document the bindings used by the Renesas R-Car Gen3 RPC SPI controller. Signed-off-by: Mason Yang --- .../devicetree/bindings/spi/spi-renesas-rpc.txt | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt diff --git a/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt new file mode 100644 index 0000000..c6c6d9c --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt @@ -0,0 +1,35 @@ +Renesas R-Car Gen3 RPC controller Device Tree Bindings +------------------------------------------------------ + +Required properties: +- compatible: should be "renesas,r8a77995-rpc" +- #address-cells: should be 1 +- #size-cells: should be 0 +- reg: should contain 2 entries, one for the registers and one for the direct + mapping area +- reg-names: should contain "rpc_regs" and "dirmap" +- interrupts: interrupt line connected to the RPC SPI controller +- clock-names: should contain "clk_rpc" +- clocks: should contain 1 entries for the module's clock + +Example: + + rpc: spi@ee200000 { + compatible = "renesas,r8a77995-rpc"; + reg = <0 0xee200000 0 0x8100>, <0 0x08000000 0 0x4000000>; + reg-names = "rpc_regs", "dirmap"; + clocks = <&cpg CPG_MOD 917>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 917>; + clock-names = "clk_rpc"; + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; + };