| Message ID | 1544000815-28069-4-git-send-email-biju.das@bp.renesas.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Delegated to: | Simon Horman |
| Headers | show |
| Series | Add more support to RZ/G1N | expand |
On Wed, Dec 05, 2018 at 09:06:53AM +0000, Biju Das wrote: > Add du node to r8a7744 SoC DT. Boards that want to enable the DU > need to specify the output topology. > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> > --- > V1-->V2 > * Removed LVDS encoder definition from DU node. I would like this and the remaining patches in this series to receive some review before I apply them. This likely means they will be accepted for v4.22 as I am planning to close the renesas tree for non-bugfixes for v4.21 later today. b > --- > arch/arm/boot/dts/r8a7744.dtsi | 11 ++++++++--- > 1 file changed, 8 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi > index 04148d6..6a51b16 100644 > --- a/arch/arm/boot/dts/r8a7744.dtsi > +++ b/arch/arm/boot/dts/r8a7744.dtsi > @@ -1645,8 +1645,14 @@ > }; > > du: display@feb00000 { > - reg = <0 0xfeb00000 0 0x40000>, > - <0 0xfeb90000 0 0x1c>; > + compatible = "renesas,du-r8a7744"; > + reg = <0 0xfeb00000 0 0x40000>; > + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 724>, > + <&cpg CPG_MOD 723>; > + clock-names = "du.0", "du.1"; > + status = "disabled"; > > ports { > #address-cells = <1>; > @@ -1663,7 +1669,6 @@ > }; > }; > }; > - /* placeholder */ > }; > > prr: chipid@ff000044 { > -- > 2.7.4 >
Hi Biju, On Wed, Dec 5, 2018 at 10:15 AM Biju Das <biju.das@bp.renesas.com> wrote: > Add du node to r8a7744 SoC DT. Boards that want to enable the DU > need to specify the output topology. > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> Thanks for your patch! > --- > V1-->V2 > * Removed LVDS encoder definition from DU node. Shouldn't you add a new node for the LVDS encoder? Gr{oetje,eeting}s, Geert
Hi Geert, Thanks for the feedback. > Subject: Re: [PATCH v2 3/5] ARM: dts: r8a7744: Add DU support > > Hi Biju, > > On Wed, Dec 5, 2018 at 10:15 AM Biju Das <biju.das@bp.renesas.com> > wrote: > > Add du node to r8a7744 SoC DT. Boards that want to enable the DU need > > to specify the output topology. > > > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> > > Thanks for your patch! > > > --- > > V1-->V2 > > * Removed LVDS encoder definition from DU node. > > Shouldn't you add a new node for the LVDS encoder? Yes, I will add the new node for LVDS encoder for SoC dtsi. Regards, Biju Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi index 04148d6..6a51b16 100644 --- a/arch/arm/boot/dts/r8a7744.dtsi +++ b/arch/arm/boot/dts/r8a7744.dtsi @@ -1645,8 +1645,14 @@ }; du: display@feb00000 { - reg = <0 0xfeb00000 0 0x40000>, - <0 0xfeb90000 0 0x1c>; + compatible = "renesas,du-r8a7744"; + reg = <0 0xfeb00000 0 0x40000>; + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>; + clock-names = "du.0", "du.1"; + status = "disabled"; ports { #address-cells = <1>; @@ -1663,7 +1669,6 @@ }; }; }; - /* placeholder */ }; prr: chipid@ff000044 {
Add du node to r8a7744 SoC DT. Boards that want to enable the DU need to specify the output topology. Signed-off-by: Biju Das <biju.das@bp.renesas.com> --- V1-->V2 * Removed LVDS encoder definition from DU node. --- arch/arm/boot/dts/r8a7744.dtsi | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-)