| Message ID | 1559891639-62529-3-git-send-email-biju.das@bp.renesas.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 61e0505b162a3974663cc6d1dbec30268a7a03ea |
| Delegated to: | Simon Horman |
| Headers | show |
| Series | Add PCIe support for HiHope RZ/G2M platform | expand |
On Fri, Jun 7, 2019 at 9:18 AM Biju Das <biju.das@bp.renesas.com> wrote: > Declare pcie bus clock, since it is generated on the HiHope RZ/G2M main > board. > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
On Fri, Jun 07, 2019 at 08:13:58AM +0100, Biju Das wrote: > Declare pcie bus clock, since it is generated on the HiHope RZ/G2M main > board. > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> Thanks, applied for inclusion in v5.3. > --- > arch/arm64/boot/dts/renesas/hihope-common.dtsi | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/hihope-common.dtsi b/arch/arm64/boot/dts/renesas/hihope-common.dtsi > index 4cc924d..95ac6fa 100644 > --- a/arch/arm64/boot/dts/renesas/hihope-common.dtsi > +++ b/arch/arm64/boot/dts/renesas/hihope-common.dtsi > @@ -26,6 +26,10 @@ > clock-frequency = <32768>; > }; > > +&pcie_bus_clk { > + clock-frequency = <100000000>; > +}; > + > &pfc { > pinctrl-0 = <&scif_clk_pins>; > pinctrl-names = "default"; > -- > 2.7.4 >
diff --git a/arch/arm64/boot/dts/renesas/hihope-common.dtsi b/arch/arm64/boot/dts/renesas/hihope-common.dtsi index 4cc924d..95ac6fa 100644 --- a/arch/arm64/boot/dts/renesas/hihope-common.dtsi +++ b/arch/arm64/boot/dts/renesas/hihope-common.dtsi @@ -26,6 +26,10 @@ clock-frequency = <32768>; }; +&pcie_bus_clk { + clock-frequency = <100000000>; +}; + &pfc { pinctrl-0 = <&scif_clk_pins>; pinctrl-names = "default";
Declare pcie bus clock, since it is generated on the HiHope RZ/G2M main board. Signed-off-by: Biju Das <biju.das@bp.renesas.com> --- arch/arm64/boot/dts/renesas/hihope-common.dtsi | 4 ++++ 1 file changed, 4 insertions(+)