diff mbox series

[3/3] ARM: dts: Add CMT0 and CMT1 to r8a7792

Message ID 156076302818.5827.976723043537886578.sendpatchset@octo (mailing list archive)
State Accepted
Commit c7f1d31da6c4220018c4a9f6839e9ed0582d546c
Delegated to: Simon Horman
Headers show
Series ARM: dts: Minor CMT update for 32-bit ARM SoCs | expand

Commit Message

Magnus Damm June 17, 2019, 9:17 a.m. UTC 
From: Magnus Damm <damm+renesas@opensource.se>

Add CMT0 and CMT1 to the R-Car Gen2 V2H (r8a7792) SoC.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 arch/arm/boot/dts/r8a7792.dtsi |   34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

Comments

Geert Uytterhoeven June 18, 2019, 1:54 p.m. UTC | #1 
On Mon, Jun 17, 2019 at 11:17 AM Magnus Damm <magnus.damm@gmail.com> wrote:
> From: Magnus Damm <damm+renesas@opensource.se>
>
> Add CMT0 and CMT1 to the R-Car Gen2 V2H (r8a7792) SoC.
>
> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert
Simon Horman June 19, 2019, 12:10 p.m. UTC | #2 
On Tue, Jun 18, 2019 at 03:54:29PM +0200, Geert Uytterhoeven wrote:
> On Mon, Jun 17, 2019 at 11:17 AM Magnus Damm <magnus.damm@gmail.com> wrote:
> > From: Magnus Damm <damm+renesas@opensource.se>
> >
> > Add CMT0 and CMT1 to the R-Car Gen2 V2H (r8a7792) SoC.
> >
> > Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
> 
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Thanks, applied for inclusion in v5.3.
diff mbox series

Patch

--- 0001/arch/arm/boot/dts/r8a7792.dtsi
+++ work/arch/arm/boot/dts/r8a7792.dtsi	2019-06-17 14:28:36.306948031 +0900
@@ -875,6 +875,40 @@ 
 			compatible = "renesas,prr";
 			reg = <0 0xff000044 0 4>;
 		};
+
+		cmt0: timer@ffca0000 {
+			compatible = "renesas,r8a7792-cmt0",
+				     "renesas,rcar-gen2-cmt0";
+			reg = <0 0xffca0000 0 0x1004>;
+			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 124>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+			resets = <&cpg 124>;
+
+			status = "disabled";
+		};
+
+		cmt1: timer@e6130000 {
+			compatible = "renesas,r8a7792-cmt1",
+				     "renesas,rcar-gen2-cmt1";
+			reg = <0 0xe6130000 0 0x1004>;
+			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 329>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+			resets = <&cpg 329>;
+
+			status = "disabled";
+		};
 	};
 
 	timer {