| Message ID | 1562576868-8124-2-git-send-email-yoshihiro.shimoda.uh@renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | treewide: modify sh-pfc and add support pwm duty zero | expand |
On 08.07.2019 12:07, Yoshihiro Shimoda wrote: > To clean/modify the code up later, this patch just adds new flags > "mux_set" and "gpio_enabled" into the struct sh_pfc_pin_config. > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > --- > drivers/pinctrl/sh-pfc/pinctrl.c | 14 +++++++++++++- > 1 file changed, 13 insertions(+), 1 deletion(-) > > diff --git a/drivers/pinctrl/sh-pfc/pinctrl.c b/drivers/pinctrl/sh-pfc/pinctrl.c > index 2824be4..157b257 100644 > --- a/drivers/pinctrl/sh-pfc/pinctrl.c > +++ b/drivers/pinctrl/sh-pfc/pinctrl.c > @@ -27,6 +27,8 @@ > > struct sh_pfc_pin_config { > u32 type; > + bool mux_set; > + bool gpio_enabled; > }; > > struct sh_pfc_pinctrl { > @@ -364,7 +366,15 @@ static int sh_pfc_func_set_mux(struct pinctrl_dev *pctldev, unsigned selector, > for (i = 0; i < grp->nr_pins; ++i) { > ret = sh_pfc_config_mux(pfc, grp->mux[i], PINMUX_TYPE_FUNCTION); > if (ret < 0) > - break; > + goto done; > + } > + > + /* All group pins are configurated, mark the pins as mux_set */ Configured. > + for (i = 0; i < grp->nr_pins; ++i) { > + int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]); > + struct sh_pfc_pin_config *cfg = &pmx->configs[idx]; > + > + cfg->mux_set = true; > } > > done: [...] MBR, Sergei
On Mon, Jul 8, 2019 at 11:08 AM Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> wrote: > To clean/modify the code up later, this patch just adds new flags > "mux_set" and "gpio_enabled" into the struct sh_pfc_pin_config. > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
diff --git a/drivers/pinctrl/sh-pfc/pinctrl.c b/drivers/pinctrl/sh-pfc/pinctrl.c index 2824be4..157b257 100644 --- a/drivers/pinctrl/sh-pfc/pinctrl.c +++ b/drivers/pinctrl/sh-pfc/pinctrl.c @@ -27,6 +27,8 @@ struct sh_pfc_pin_config { u32 type; + bool mux_set; + bool gpio_enabled; }; struct sh_pfc_pinctrl { @@ -364,7 +366,15 @@ static int sh_pfc_func_set_mux(struct pinctrl_dev *pctldev, unsigned selector, for (i = 0; i < grp->nr_pins; ++i) { ret = sh_pfc_config_mux(pfc, grp->mux[i], PINMUX_TYPE_FUNCTION); if (ret < 0) - break; + goto done; + } + + /* All group pins are configurated, mark the pins as mux_set */ + for (i = 0; i < grp->nr_pins; ++i) { + int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]); + struct sh_pfc_pin_config *cfg = &pmx->configs[idx]; + + cfg->mux_set = true; } done: @@ -405,6 +415,7 @@ static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev, } cfg->type = PINMUX_TYPE_GPIO; + cfg->gpio_enabled = true; ret = 0; @@ -426,6 +437,7 @@ static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev, spin_lock_irqsave(&pfc->lock, flags); cfg->type = PINMUX_TYPE_NONE; + cfg->gpio_enabled = false; spin_unlock_irqrestore(&pfc->lock, flags); }
To clean/modify the code up later, this patch just adds new flags "mux_set" and "gpio_enabled" into the struct sh_pfc_pin_config. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> --- drivers/pinctrl/sh-pfc/pinctrl.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-)