| Message ID | 1569249688-15821-1-git-send-email-biju.das@bp.renesas.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 56278c8fcb71874d591907d654272d511ce3597c |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | clk: renesas: r8a774b1: Add TMU clock | expand |
On Mon, Sep 23, 2019 at 4:41 PM Biju Das <biju.das@bp.renesas.com> wrote: > This patch adds the TMU clocks to the R8A774B1 SoC. > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in clk-renesas-for-v5.5. Gr{oetje,eeting}s, Geert
diff --git a/drivers/clk/renesas/r8a774b1-cpg-mssr.c b/drivers/clk/renesas/r8a774b1-cpg-mssr.c index 6cad6ba..c9af7091 100644 --- a/drivers/clk/renesas/r8a774b1-cpg-mssr.c +++ b/drivers/clk/renesas/r8a774b1-cpg-mssr.c @@ -110,6 +110,11 @@ static const struct cpg_core_clk r8a774b1_core_clks[] __initconst = { }; static const struct mssr_mod_clk r8a774b1_mod_clks[] __initconst = { + DEF_MOD("tmu4", 121, R8A774B1_CLK_S0D6), + DEF_MOD("tmu3", 122, R8A774B1_CLK_S3D2), + DEF_MOD("tmu2", 123, R8A774B1_CLK_S3D2), + DEF_MOD("tmu1", 124, R8A774B1_CLK_S3D2), + DEF_MOD("tmu0", 125, R8A774B1_CLK_CP), DEF_MOD("fdp1-0", 119, R8A774B1_CLK_S0D1), DEF_MOD("scif5", 202, R8A774B1_CLK_S3D4), DEF_MOD("scif4", 203, R8A774B1_CLK_S3D4),
This patch adds the TMU clocks to the R8A774B1 SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> --- This patch depend upon the below patch https://patchwork.kernel.org/patch/11151827/ --- drivers/clk/renesas/r8a774b1-cpg-mssr.c | 5 +++++ 1 file changed, 5 insertions(+)