Message ID | 1570029619-43238-5-git-send-email-biju.das@bp.renesas.com (mailing list archive) |
---|---|
State | Mainlined |
Commit | fdf130155fa05fdce7f975c68c9e8882c05ca45c |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | Add Display support | expand |
On Wed, Oct 2, 2019 at 5:20 PM Biju Das <biju.das@bp.renesas.com> wrote: > Add display clock properties for the HiHope RZ/G2N board. > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v5.5. Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n.dts b/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n.dts index c9e2119..9910c1a 100644 --- a/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n.dts +++ b/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n.dts @@ -25,6 +25,17 @@ }; }; +&du { + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 721>, + <&versaclock5 1>, + <&x302_clk>, + <&versaclock5 2>; + clock-names = "du.0", "du.1", "du.3", + "dclkin.0", "dclkin.1", "dclkin.3"; +}; + &sdhi3 { mmc-hs400-1_8v; };