| Message ID | 1594811350-14066-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | Add support for [H]SCIF/TMU/CMT/THS/SDHI/MSIOF/CAN[FD]/I2C/IIC/RWDT on R8A774E1 | expand |
On Wed, Jul 15, 2020 at 1:09 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > Document SoC specific bindings for RZ/G2H (r8a774e1) SoC. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
On Wed, 15 Jul 2020 12:08:55 +0100, Lad Prabhakar wrote: > Document SoC specific bindings for RZ/G2H (r8a774e1) SoC. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > --- > Documentation/devicetree/bindings/timer/renesas,cmt.yaml | 2 ++ > 1 file changed, 2 insertions(+) > Acked-by: Rob Herring <robh@kernel.org>
Hi Daniel and Thomas, On Wed, Jul 15, 2020 at 12:09 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > > Document SoC specific bindings for RZ/G2H (r8a774e1) SoC. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > --- > Documentation/devicetree/bindings/timer/renesas,cmt.yaml | 2 ++ > 1 file changed, 2 insertions(+) > Gentle ping. Cheers, Prabhakar
Hi Daniel and Thomas, On Thu, Aug 27, 2020 at 6:00 PM Lad, Prabhakar <prabhakar.csengg@gmail.com> wrote: > > Hi Daniel and Thomas, > > On Wed, Jul 15, 2020 at 12:09 PM Lad Prabhakar > <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > > > > Document SoC specific bindings for RZ/G2H (r8a774e1) SoC. > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > --- > > Documentation/devicetree/bindings/timer/renesas,cmt.yaml | 2 ++ > > 1 file changed, 2 insertions(+) > > > Gentle ping. > Could you please pick this patch. Cheers, Prabhakar
On 19/09/2020 13:00, Lad, Prabhakar wrote: > Hi Daniel and Thomas, > > On Thu, Aug 27, 2020 at 6:00 PM Lad, Prabhakar > <prabhakar.csengg@gmail.com> wrote: >> >> Hi Daniel and Thomas, >> >> On Wed, Jul 15, 2020 at 12:09 PM Lad Prabhakar >> <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: >>> >>> Document SoC specific bindings for RZ/G2H (r8a774e1) SoC. >>> >>> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> >>> --- >>> Documentation/devicetree/bindings/timer/renesas,cmt.yaml | 2 ++ >>> 1 file changed, 2 insertions(+) >>> >> Gentle ping. >> > Could you please pick this patch. Applied, thanks
diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml index 7e4dc5623da8..0e6f25519bf8 100644 --- a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml @@ -69,6 +69,7 @@ properties: - renesas,r8a774a1-cmt0 # 32-bit CMT0 on RZ/G2M - renesas,r8a774b1-cmt0 # 32-bit CMT0 on RZ/G2N - renesas,r8a774c0-cmt0 # 32-bit CMT0 on RZ/G2E + - renesas,r8a774e1-cmt0 # 32-bit CMT0 on RZ/G2H - renesas,r8a7795-cmt0 # 32-bit CMT0 on R-Car H3 - renesas,r8a7796-cmt0 # 32-bit CMT0 on R-Car M3-W - renesas,r8a77965-cmt0 # 32-bit CMT0 on R-Car M3-N @@ -83,6 +84,7 @@ properties: - renesas,r8a774a1-cmt1 # 48-bit CMT on RZ/G2M - renesas,r8a774b1-cmt1 # 48-bit CMT on RZ/G2N - renesas,r8a774c0-cmt1 # 48-bit CMT on RZ/G2E + - renesas,r8a774e1-cmt1 # 48-bit CMT on RZ/G2H - renesas,r8a7795-cmt1 # 48-bit CMT on R-Car H3 - renesas,r8a7796-cmt1 # 48-bit CMT on R-Car M3-W - renesas,r8a77965-cmt1 # 48-bit CMT on R-Car M3-N
Document SoC specific bindings for RZ/G2H (r8a774e1) SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> --- Documentation/devicetree/bindings/timer/renesas,cmt.yaml | 2 ++ 1 file changed, 2 insertions(+)