| Message ID | 1599470390-29719-5-git-send-email-yoshihiro.shimoda.uh@renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | treewide: add initial support for R-Car V3U | expand |
Hi Shimoda-san, Thanks for your patch! On Mon, Sep 7, 2020 at 11:20 AM Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> wrote: > Adds power domain indices fpr R-Car V3U (r8a779a0). Add ... for > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > --- /dev/null > +++ b/include/dt-bindings/power/r8a779a0-sysc.h > @@ -0,0 +1,61 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Copyright (C) 2020 Renesas Electronics Corp. > + */ > +#ifndef __DT_BINDINGS_POWER_R8A779A0_SYSC_H__ > +#define __DT_BINDINGS_POWER_R8A779A0_SYSC_H__ > + > +/* > + * These power domain indices match the numbers of the interrupt bits > + * representing the power areas in the various Interrupt Registers > + * (e.g. SYSCISCR0, Interrupt Status/Clear Register 0) ... match the Power Domain Register Numbers (PDR)? Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in for v5.10, in a branch shared by driver and DT. If you agree, I can fix the above while applying. Gr{oetje,eeting}s, Geert
Hi Geert-san, > From: Geert Uytterhoeven, Sent: Tuesday, September 8, 2020 5:39 PM > > Hi Shimoda-san, > > Thanks for your patch! > > On Mon, Sep 7, 2020 at 11:20 AM Yoshihiro Shimoda > <yoshihiro.shimoda.uh@renesas.com> wrote: > > Adds power domain indices fpr R-Car V3U (r8a779a0). > > Add ... for > > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > > > --- /dev/null > > +++ b/include/dt-bindings/power/r8a779a0-sysc.h > > @@ -0,0 +1,61 @@ > > +/* SPDX-License-Identifier: GPL-2.0-only */ > > +/* > > + * Copyright (C) 2020 Renesas Electronics Corp. > > + */ > > +#ifndef __DT_BINDINGS_POWER_R8A779A0_SYSC_H__ > > +#define __DT_BINDINGS_POWER_R8A779A0_SYSC_H__ > > + > > +/* > > + * These power domain indices match the numbers of the interrupt bits > > + * representing the power areas in the various Interrupt Registers > > + * (e.g. SYSCISCR0, Interrupt Status/Clear Register 0) > > ... match the Power Domain Register Numbers (PDR)? > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > i.e. will queue in for v5.10, in a branch shared by driver and DT. > > If you agree, I can fix the above while applying. Thank you for pointed it out! I agree about fixing these. Best regards, Yoshihiro Shimoda
diff --git a/include/dt-bindings/power/r8a779a0-sysc.h b/include/dt-bindings/power/r8a779a0-sysc.h new file mode 100644 index 0000000..e7e9e89 --- /dev/null +++ b/include/dt-bindings/power/r8a779a0-sysc.h @@ -0,0 +1,61 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2020 Renesas Electronics Corp. + */ +#ifndef __DT_BINDINGS_POWER_R8A779A0_SYSC_H__ +#define __DT_BINDINGS_POWER_R8A779A0_SYSC_H__ + +/* + * These power domain indices match the numbers of the interrupt bits + * representing the power areas in the various Interrupt Registers + * (e.g. SYSCISCR0, Interrupt Status/Clear Register 0) + */ + +#define R8A779A0_PD_A1E0D0C0 0 +#define R8A779A0_PD_A1E0D0C1 1 +#define R8A779A0_PD_A1E0D1C0 2 +#define R8A779A0_PD_A1E0D1C1 3 +#define R8A779A0_PD_A1E1D0C0 4 +#define R8A779A0_PD_A1E1D0C1 5 +#define R8A779A0_PD_A1E1D1C0 6 +#define R8A779A0_PD_A1E1D1C1 7 +#define R8A779A0_PD_A2E0D0 16 +#define R8A779A0_PD_A2E0D1 17 +#define R8A779A0_PD_A2E1D0 18 +#define R8A779A0_PD_A2E1D1 19 +#define R8A779A0_PD_A3E0 20 +#define R8A779A0_PD_A3E1 21 +#define R8A779A0_PD_3DG_A 24 +#define R8A779A0_PD_3DG_B 25 +#define R8A779A0_PD_A1CNN2 32 +#define R8A779A0_PD_A1DSP0 33 +#define R8A779A0_PD_A2IMP01 34 +#define R8A779A0_PD_A2DP0 35 +#define R8A779A0_PD_A2CV0 36 +#define R8A779A0_PD_A2CV1 37 +#define R8A779A0_PD_A2CV4 38 +#define R8A779A0_PD_A2CV6 39 +#define R8A779A0_PD_A2CN2 40 +#define R8A779A0_PD_A1CNN0 41 +#define R8A779A0_PD_A2CN0 42 +#define R8A779A0_PD_A3IR 43 +#define R8A779A0_PD_A1CNN1 44 +#define R8A779A0_PD_A1DSP1 45 +#define R8A779A0_PD_A2IMP23 46 +#define R8A779A0_PD_A2DP1 47 +#define R8A779A0_PD_A2CV2 48 +#define R8A779A0_PD_A2CV3 49 +#define R8A779A0_PD_A2CV5 50 +#define R8A779A0_PD_A2CV7 51 +#define R8A779A0_PD_A2CN1 52 +#define R8A779A0_PD_A3VIP0 56 +#define R8A779A0_PD_A3VIP1 57 +#define R8A779A0_PD_A3VIP2 58 +#define R8A779A0_PD_A3VIP3 59 +#define R8A779A0_PD_A3ISP01 60 +#define R8A779A0_PD_A3ISP23 61 + +/* Always-on power area */ +#define R8A779A0_PD_ALWAYS_ON 64 + +#endif /* __DT_BINDINGS_POWER_R8A779A0_SYSC_H__ */
Adds power domain indices fpr R-Car V3U (r8a779a0). Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> --- include/dt-bindings/power/r8a779a0-sysc.h | 61 +++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 include/dt-bindings/power/r8a779a0-sysc.h