From patchwork Fri Jan 29 00:26:10 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 8155291 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-renesas-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id CE400BEEE5 for ; Fri, 29 Jan 2016 00:26:16 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E009320377 for ; Fri, 29 Jan 2016 00:26:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E484620374 for ; Fri, 29 Jan 2016 00:26:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751681AbcA2A0O (ORCPT ); Thu, 28 Jan 2016 19:26:14 -0500 Received: from kirsty.vergenet.net ([202.4.237.240]:32952 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751193AbcA2A0N (ORCPT ); Thu, 28 Jan 2016 19:26:13 -0500 Received: from reginn.isobedori.kobe.vergenet.net (p5023-ipbfp803kobeminato.hyogo.ocn.ne.jp [123.221.39.23]) by kirsty.vergenet.net (Postfix) with ESMTPA id 903D325B7E1; Fri, 29 Jan 2016 11:26:11 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1454027171; bh=gDJ1U50ttsuwLP71Rp3hEBV6pQ8r9xqSyodxH6lhJrM=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=WZYtMDovkCjk5v6T0r9GMohEya/nRk4uBBpVqzgx7ewKpcVTdLSryWab4vHdtq9Oc hHUEx17ohzcfzwj4uxeikMFUWxBALnGHvx27Zbp53oRqP9byOQ46CcoYnCRDrWKYjK dWLfVgQP8SCv2QyQ0MwG7TtMBTYEkp0zucHCdWTU= Received: by reginn.isobedori.kobe.vergenet.net (Postfix, from userid 7100) id 172B69406F5; Fri, 29 Jan 2016 09:26:10 +0900 (JST) Date: Fri, 29 Jan 2016 09:26:10 +0900 From: Simon Horman To: Geert Uytterhoeven Cc: linux-renesas-soc@vger.kernel.org, "linux-arm-kernel@lists.infradead.org" , Magnus Damm Subject: Re: [PATCH] ARM: dts: emev2:use GIC_* defines Message-ID: <20160129002609.GB26068@verge.net.au> References: <1453944594-24757-1-git-send-email-horms+renesas@verge.net.au> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Organisation: Horms Solutions Ltd. User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Thu, Jan 28, 2016 at 09:15:50AM +0100, Geert Uytterhoeven wrote: > Hi Simon, > > On Thu, Jan 28, 2016 at 2:29 AM, Simon Horman > wrote: > > Use GIC_* defines for GIC interrupt cells in emev2 device tree. > > > > Signed-off-by: Simon Horman > > --- > > Based on renesas-devel-20160127-v4.5-rc1 > > --- > > arch/arm/boot/dts/emev2.dtsi | 37 +++++++++++++++++++------------------ > > 1 file changed, 19 insertions(+), 18 deletions(-) > > > > diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi > > index 57795da616cb..366e822367c7 100644 > > --- a/arch/arm/boot/dts/emev2.dtsi > > +++ b/arch/arm/boot/dts/emev2.dtsi > > @@ -9,6 +9,7 @@ > > */ > > > > #include "skeleton.dtsi" > > +#include > > #include > > > > / { > > @@ -53,7 +54,7 @@ > > > > pmu { > > compatible = "arm,cortex-a9-pmu"; > > - interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>, > > + interrupts = , > > <0 121 IRQ_TYPE_LEVEL_HIGH>; > > If you convert the above line, too, you can add my > Acked-by: Geert Uytterhoeven Thanks, I have fixed that and queued up the following: From: Simon Horman Date: Thu, 28 Jan 2016 10:29:54 +0900 Subject: [PATCH] ARM: dts: emev2:use GIC_* defines Use GIC_* defines for GIC interrupt cells in emev2 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/emev2.dtsi | 39 ++++++++++++++++++++------------------- 1 file changed, 20 insertions(+), 19 deletions(-) diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi index 57795da616cb..bcce6f50c93d 100644 --- a/arch/arm/boot/dts/emev2.dtsi +++ b/arch/arm/boot/dts/emev2.dtsi @@ -9,6 +9,7 @@ */ #include "skeleton.dtsi" +#include #include / { @@ -53,8 +54,8 @@ pmu { compatible = "arm,cortex-a9-pmu"; - interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>, - <0 121 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; }; clocks@e0110000 { @@ -158,7 +159,7 @@ timer@e0180000 { compatible = "renesas,em-sti"; reg = <0xe0180000 0x54>; - interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&sti_sclk>; clock-names = "sclk"; }; @@ -166,7 +167,7 @@ uart0: serial@e1020000 { compatible = "renesas,em-uart"; reg = <0xe1020000 0x38>; - interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&usia_u0_sclk>; clock-names = "sclk"; }; @@ -174,7 +175,7 @@ uart1: serial@e1030000 { compatible = "renesas,em-uart"; reg = <0xe1030000 0x38>; - interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&usib_u1_sclk>; clock-names = "sclk"; }; @@ -182,7 +183,7 @@ uart2: serial@e1040000 { compatible = "renesas,em-uart"; reg = <0xe1040000 0x38>; - interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&usib_u2_sclk>; clock-names = "sclk"; }; @@ -190,7 +191,7 @@ uart3: serial@e1050000 { compatible = "renesas,em-uart"; reg = <0xe1050000 0x38>; - interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&usib_u3_sclk>; clock-names = "sclk"; }; @@ -203,8 +204,8 @@ gpio0: gpio@e0050000 { compatible = "renesas,em-gio"; reg = <0xe0050000 0x2c>, <0xe0050040 0x20>; - interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>, - <0 68 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; gpio-controller; gpio-ranges = <&pfc 0 0 32>; #gpio-cells = <2>; @@ -215,8 +216,8 @@ gpio1: gpio@e0050080 { compatible = "renesas,em-gio"; reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>; - interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>, - <0 70 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; gpio-controller; gpio-ranges = <&pfc 0 32 32>; #gpio-cells = <2>; @@ -227,8 +228,8 @@ gpio2: gpio@e0050100 { compatible = "renesas,em-gio"; reg = <0xe0050100 0x2c>, <0xe0050140 0x20>; - interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>, - <0 72 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; gpio-controller; gpio-ranges = <&pfc 0 64 32>; #gpio-cells = <2>; @@ -239,8 +240,8 @@ gpio3: gpio@e0050180 { compatible = "renesas,em-gio"; reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>; - interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>, - <0 74 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; gpio-controller; gpio-ranges = <&pfc 0 96 32>; #gpio-cells = <2>; @@ -251,8 +252,8 @@ gpio4: gpio@e0050200 { compatible = "renesas,em-gio"; reg = <0xe0050200 0x2c>, <0xe0050240 0x20>; - interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>, - <0 76 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; gpio-controller; gpio-ranges = <&pfc 0 128 31>; #gpio-cells = <2>; @@ -266,7 +267,7 @@ #size-cells = <0>; compatible = "renesas,iic-emev2"; reg = <0xe0070000 0x28>; - interrupts = <0 32 IRQ_TYPE_EDGE_RISING>; + interrupts = ; clocks = <&iic0_sclk>; clock-names = "sclk"; status = "disabled"; @@ -277,7 +278,7 @@ #size-cells = <0>; compatible = "renesas,iic-emev2"; reg = <0xe10a0000 0x28>; - interrupts = <0 33 IRQ_TYPE_EDGE_RISING>; + interrupts = ; clocks = <&iic1_sclk>; clock-names = "sclk"; status = "disabled";