From patchwork Mon Feb 15 12:04:38 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 8313961 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Original-To: patchwork-linux-renesas-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 1F9F7C02AA for ; Mon, 15 Feb 2016 12:01:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2B8A02034C for ; Mon, 15 Feb 2016 12:01:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E5C94202AE for ; Mon, 15 Feb 2016 12:01:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752906AbcBOMBw (ORCPT ); Mon, 15 Feb 2016 07:01:52 -0500 Received: from mail-pf0-f176.google.com ([209.85.192.176]:34192 "EHLO mail-pf0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751277AbcBOMBv (ORCPT ); Mon, 15 Feb 2016 07:01:51 -0500 Received: by mail-pf0-f176.google.com with SMTP id x65so86686999pfb.1; Mon, 15 Feb 2016 04:01:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:date:message-id:subject; bh=D3ITI8ov36rl35PPg7kJfbXi+OyWc9tRtHFTydQ3E9g=; b=da8K3xYJvyI9jfB6tA4gMh5CG5SWtSQeUHK8Jx9WatKpmjS8PEleVzFVmzxC/cNASi V8FAXGD93FqD60yOrIROnorgDEqsZnRXSWaXXW9rM3vH6hAi5vJON9iyOw9hOkWsM1yO k2Yh9aspmqbLms9xDCrhF3wlqGT0d0va7d4R0k2kf7jGkEQB5g+evBCv93KOB1tRMu0L RupXBM7hug8WrtVfcfbuzDhDscnFeeQoAIhDncwvnOaxeTzGWterPGvmri0uyblTpddq 24wGrnVsqhwA7hdKiHCCSorZcS/ZLuN8RqxouiFsz1mnkSHZOB0V5CqPQ15wU/7XBqv2 IpAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:date:message-id:subject; bh=D3ITI8ov36rl35PPg7kJfbXi+OyWc9tRtHFTydQ3E9g=; b=mCOeuTKL+IUmomtMkCcIxQsFFOxriYXecsccVQXCF8E8tBOQ/3kl71p1Ft1SDntvuK 5mXDdzE7gokpJ5kv4d2ujFHabOG+ZH0BVJ/TzspxdpQDGqoayEDO+qA8spKJSj1+86et yTgnW5V6/q5J/utXdoKLWKACzX9XsZVh+2fHoKNJo1+lp6txiR+ejw9dS1gjV+Zi5j8T q9Ut8i6g5byn4ZtxK+q1D/4gDxo8jgc4RWBKeOgDtICuKw5UkTUMeSNQ6X6Yo0LRZpVd xKoh/PqB7WML8uxilD0oC7P2YniXiLNmw6ugI/CMyp3io7hAont41UlXq2ZpcE9RqTAk uqvw== X-Gm-Message-State: AG10YOSgvLPb9AIif4nMIDz4DlIrffbYBgNII5sqd8KzgxQPIel2Pp4OIUnyD/oVOe4SBw== X-Received: by 10.98.33.70 with SMTP id h67mr22520957pfh.54.1455537711029; Mon, 15 Feb 2016 04:01:51 -0800 (PST) Received: from [127.0.0.1] (s214090.ppp.asahi-net.or.jp. [220.157.214.90]) by smtp.gmail.com with ESMTPSA id r87sm38168282pfa.61.2016.02.15.04.01.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 15 Feb 2016 04:01:49 -0800 (PST) From: Magnus Damm To: linux-renesas-soc@vger.kernel.org Cc: linus.walleij@linaro.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, horms@verge.net.au, geert@glider.be, laurent.pinchart@ideasonboard.com, Magnus Damm Date: Mon, 15 Feb 2016 21:04:38 +0900 Message-Id: <20160215120438.24670.15402.sendpatchset@little-apple> Subject: [PATCH] pinctrl: sh-pfc: Rework PFC GPIO support Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Magnus Damm The sh-pfc Pinctrl driver is currently handling SoC-specific PFC hardware blocks on Arm64, Arm and SH architectures. For older SoCs using SH cores and some 32-bit Arm SoCs the PFC hardware also provides GPIO functionality. On the majority of 32-bit Arm SoCs from Renesas and so far all Arm64 SoCs the GPIO feature is provided by separate hardware blocks. So far GPIO support in the PFC driver has been compiled-in for the majority of the SoCs, but with this patch applied the SoCs with PFC support may select from one of the following: - CONFIG_PINCTRL_SH_PFC - Used if PFC lacks GPIO hardware - CONFIG_PINCTRL_SH_PFC_GPIO - Used if PFC includes GPIO support This patch results in the following changes: - The GPIO functionality is only compiled-in on relevant SoCs - The number of lines of code is reduced Build tested using the following configurations: - r8a7795 -> CONFIG_PINCTRL_SH_PFC_GPIO=n -> Ok (Arm64) - r8a7790 -> CONFIG_PINCTRL_SH_PFC_GPIO=n -> Ok (Arm) - r8a7790 + r8a7740 -> CONFIG_PINCTRL_SH_PFC_GPIO=y -> Ok (Arm) - r8a7740 -> CONFIG_PINCTRL_SH_PFC_GPIO=y -> Ok (Arm) Signed-off-by: Magnus Damm --- drivers/pinctrl/sh-pfc/Kconfig | 54 ++++++++++++++------------------------- drivers/pinctrl/sh-pfc/Makefile | 33 ++++++++++------------- drivers/pinctrl/sh-pfc/core.c | 4 +- 3 files changed, 37 insertions(+), 54 deletions(-) --- 0001/drivers/pinctrl/sh-pfc/Kconfig +++ work/drivers/pinctrl/sh-pfc/Kconfig 2016-02-15 19:59:35.080513000 +0900 @@ -5,7 +5,6 @@ if ARCH_SHMOBILE || SUPERH config PINCTRL_SH_PFC - select GPIO_SH_PFC if ARCH_REQUIRE_GPIOLIB select PINMUX select PINCONF select GENERIC_PINCONF @@ -13,12 +12,12 @@ config PINCTRL_SH_PFC help This enables pin control drivers for SH and SH Mobile platforms -config GPIO_SH_PFC - bool "SuperH PFC GPIO support" - depends on PINCTRL_SH_PFC && GPIOLIB +config PINCTRL_SH_PFC_GPIO + select GPIOLIB + select PINCTRL_SH_PFC + def_bool n help - This enables support for GPIOs within the SoC's pin function - controller. + This enables pin control and GPIO drivers for SH/SH Mobile platforms config PINCTRL_PFC_EMEV2 def_bool y @@ -28,12 +27,12 @@ config PINCTRL_PFC_EMEV2 config PINCTRL_PFC_R8A73A4 def_bool y depends on ARCH_R8A73A4 - select PINCTRL_SH_PFC + select PINCTRL_SH_PFC_GPIO config PINCTRL_PFC_R8A7740 def_bool y depends on ARCH_R8A7740 - select PINCTRL_SH_PFC + select PINCTRL_SH_PFC_GPIO config PINCTRL_PFC_R8A7778 def_bool y @@ -73,79 +72,66 @@ config PINCTRL_PFC_R8A7795 config PINCTRL_PFC_SH7203 def_bool y depends on CPU_SUBTYPE_SH7203 - depends on GPIOLIB - select PINCTRL_SH_PFC + select PINCTRL_SH_PFC_GPIO config PINCTRL_PFC_SH7264 def_bool y depends on CPU_SUBTYPE_SH7264 - depends on GPIOLIB - select PINCTRL_SH_PFC + select PINCTRL_SH_PFC_GPIO config PINCTRL_PFC_SH7269 def_bool y depends on CPU_SUBTYPE_SH7269 - depends on GPIOLIB - select PINCTRL_SH_PFC + select PINCTRL_SH_PFC_GPIO config PINCTRL_PFC_SH73A0 def_bool y depends on ARCH_SH73A0 - select PINCTRL_SH_PFC + select PINCTRL_SH_PFC_GPIO select REGULATOR config PINCTRL_PFC_SH7720 def_bool y depends on CPU_SUBTYPE_SH7720 - depends on GPIOLIB - select PINCTRL_SH_PFC + select PINCTRL_SH_PFC_GPIO config PINCTRL_PFC_SH7722 def_bool y depends on CPU_SUBTYPE_SH7722 - depends on GPIOLIB - select PINCTRL_SH_PFC + select PINCTRL_SH_PFC_GPIO config PINCTRL_PFC_SH7723 def_bool y depends on CPU_SUBTYPE_SH7723 - depends on GPIOLIB - select PINCTRL_SH_PFC + select PINCTRL_SH_PFC_GPIO config PINCTRL_PFC_SH7724 def_bool y depends on CPU_SUBTYPE_SH7724 - depends on GPIOLIB - select PINCTRL_SH_PFC + select PINCTRL_SH_PFC_GPIO config PINCTRL_PFC_SH7734 def_bool y depends on CPU_SUBTYPE_SH7734 - depends on GPIOLIB - select PINCTRL_SH_PFC + select PINCTRL_SH_PFC_GPIO config PINCTRL_PFC_SH7757 def_bool y depends on CPU_SUBTYPE_SH7757 - depends on GPIOLIB - select PINCTRL_SH_PFC + select PINCTRL_SH_PFC_GPIO config PINCTRL_PFC_SH7785 def_bool y depends on CPU_SUBTYPE_SH7785 - depends on GPIOLIB - select PINCTRL_SH_PFC + select PINCTRL_SH_PFC_GPIO config PINCTRL_PFC_SH7786 def_bool y depends on CPU_SUBTYPE_SH7786 - depends on GPIOLIB - select PINCTRL_SH_PFC + select PINCTRL_SH_PFC_GPIO config PINCTRL_PFC_SHX3 def_bool y depends on CPU_SUBTYPE_SHX3 - depends on GPIOLIB - select PINCTRL_SH_PFC - + select PINCTRL_SH_PFC_GPIO endif --- 0001/drivers/pinctrl/sh-pfc/Makefile +++ work/drivers/pinctrl/sh-pfc/Makefile 2016-02-15 19:56:50.720513000 +0900 @@ -1,11 +1,8 @@ sh-pfc-objs = core.o pinctrl.o -ifeq ($(CONFIG_GPIO_SH_PFC),y) -sh-pfc-objs += gpio.o -endif obj-$(CONFIG_PINCTRL_SH_PFC) += sh-pfc.o obj-$(CONFIG_PINCTRL_PFC_EMEV2) += pfc-emev2.o -obj-$(CONFIG_PINCTRL_PFC_R8A73A4) += pfc-r8a73a4.o -obj-$(CONFIG_PINCTRL_PFC_R8A7740) += pfc-r8a7740.o +obj-$(CONFIG_PINCTRL_PFC_R8A73A4) += pfc-r8a73a4.o gpio.o +obj-$(CONFIG_PINCTRL_PFC_R8A7740) += pfc-r8a7740.o gpio.o obj-$(CONFIG_PINCTRL_PFC_R8A7778) += pfc-r8a7778.o obj-$(CONFIG_PINCTRL_PFC_R8A7779) += pfc-r8a7779.o obj-$(CONFIG_PINCTRL_PFC_R8A7790) += pfc-r8a7790.o @@ -13,16 +10,16 @@ obj-$(CONFIG_PINCTRL_PFC_R8A7791) += pfc obj-$(CONFIG_PINCTRL_PFC_R8A7793) += pfc-r8a7791.o obj-$(CONFIG_PINCTRL_PFC_R8A7794) += pfc-r8a7794.o obj-$(CONFIG_PINCTRL_PFC_R8A7795) += pfc-r8a7795.o -obj-$(CONFIG_PINCTRL_PFC_SH7203) += pfc-sh7203.o -obj-$(CONFIG_PINCTRL_PFC_SH7264) += pfc-sh7264.o -obj-$(CONFIG_PINCTRL_PFC_SH7269) += pfc-sh7269.o -obj-$(CONFIG_PINCTRL_PFC_SH73A0) += pfc-sh73a0.o -obj-$(CONFIG_PINCTRL_PFC_SH7720) += pfc-sh7720.o -obj-$(CONFIG_PINCTRL_PFC_SH7722) += pfc-sh7722.o -obj-$(CONFIG_PINCTRL_PFC_SH7723) += pfc-sh7723.o -obj-$(CONFIG_PINCTRL_PFC_SH7724) += pfc-sh7724.o -obj-$(CONFIG_PINCTRL_PFC_SH7734) += pfc-sh7734.o -obj-$(CONFIG_PINCTRL_PFC_SH7757) += pfc-sh7757.o -obj-$(CONFIG_PINCTRL_PFC_SH7785) += pfc-sh7785.o -obj-$(CONFIG_PINCTRL_PFC_SH7786) += pfc-sh7786.o -obj-$(CONFIG_PINCTRL_PFC_SHX3) += pfc-shx3.o +obj-$(CONFIG_PINCTRL_PFC_SH7203) += pfc-sh7203.o gpio.o +obj-$(CONFIG_PINCTRL_PFC_SH7264) += pfc-sh7264.o gpio.o +obj-$(CONFIG_PINCTRL_PFC_SH7269) += pfc-sh7269.o gpio.o +obj-$(CONFIG_PINCTRL_PFC_SH73A0) += pfc-sh73a0.o gpio.o +obj-$(CONFIG_PINCTRL_PFC_SH7720) += pfc-sh7720.o gpio.o +obj-$(CONFIG_PINCTRL_PFC_SH7722) += pfc-sh7722.o gpio.o +obj-$(CONFIG_PINCTRL_PFC_SH7723) += pfc-sh7723.o gpio.o +obj-$(CONFIG_PINCTRL_PFC_SH7724) += pfc-sh7724.o gpio.o +obj-$(CONFIG_PINCTRL_PFC_SH7734) += pfc-sh7734.o gpio.o +obj-$(CONFIG_PINCTRL_PFC_SH7757) += pfc-sh7757.o gpio.o +obj-$(CONFIG_PINCTRL_PFC_SH7785) += pfc-sh7785.o gpio.o +obj-$(CONFIG_PINCTRL_PFC_SH7786) += pfc-sh7786.o gpio.o +obj-$(CONFIG_PINCTRL_PFC_SHX3) += pfc-shx3.o gpio.o --- 0001/drivers/pinctrl/sh-pfc/core.c +++ work/drivers/pinctrl/sh-pfc/core.c 2016-02-15 19:51:47.570513000 +0900 @@ -558,7 +558,7 @@ static int sh_pfc_probe(struct platform_ if (unlikely(ret != 0)) return ret; -#ifdef CONFIG_GPIO_SH_PFC +#ifdef CONFIG_PINCTRL_SH_PFC_GPIO /* * Then the GPIO chip */ @@ -584,7 +584,7 @@ static int sh_pfc_remove(struct platform { struct sh_pfc *pfc = platform_get_drvdata(pdev); -#ifdef CONFIG_GPIO_SH_PFC +#ifdef CONFIG_PINCTRL_SH_PFC_GPIO sh_pfc_unregister_gpiochip(pfc); #endif sh_pfc_unregister_pinctrl(pfc);