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[220.157.214.90]) by smtp.gmail.com with ESMTPSA id i29sm1941570pfi.18.2016.06.02.09.06.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 02 Jun 2016 09:06:32 -0700 (PDT) From: Magnus Damm To: iommu@lists.linux-foundation.org Cc: laurent.pinchart+renesas@ideasonboard.com, geert+renesas@glider.be, joro@8bytes.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, horms+renesas@verge.net.au, Magnus Damm , robin.murphy@arm.com, m.szyprowski@samsung.com Date: Fri, 03 Jun 2016 00:56:09 +0900 Message-Id: <20160602155609.31018.31070.sendpatchset@little-apple> In-Reply-To: <20160602155519.31018.59925.sendpatchset@little-apple> References: <20160602155519.31018.59925.sendpatchset@little-apple> Subject: [PATCH v3 05/06] iommu/ipmmu-vmsa: Add new IOMMU_DOMAIN_DMA ops Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Magnus Damm Introduce an alternative set of iommu_ops suitable for 64-bit ARM as well as 32-bit ARM when CONFIG_IOMMU_DMA=y. Signed-off-by: Magnus Damm --- Changes since V2: - Included this new patch from the following series: [PATCH 00/04] iommu/ipmmu-vmsa: IPMMU CONFIG_IOMMU_DMA update - Use only a single iommu_ops structure with #ifdef CONFIG_IOMMU_DMA - Folded in #ifdefs to handle CONFIG_ARM and CONFIG_IOMMU_DMA - of_xlate() is now used without #ifdefs - Made sure code compiles on both 32-bit and 64-bit ARM. drivers/iommu/ipmmu-vmsa.c | 111 ++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 103 insertions(+), 8 deletions(-) --- 0008/drivers/iommu/ipmmu-vmsa.c +++ work/drivers/iommu/ipmmu-vmsa.c 2016-06-02 22:15:52.090607110 +0900 @@ -10,6 +10,7 @@ #include #include +#include #include #include #include @@ -22,8 +23,10 @@ #include #include +#if defined(CONFIG_ARM) && !defined(CONFIG_IOMMU_DMA) #include #include +#endif #include "io-pgtable.h" @@ -520,14 +523,6 @@ static struct iommu_domain *__ipmmu_doma return &domain->io_domain; } -static struct iommu_domain *ipmmu_domain_alloc(unsigned type) -{ - if (type != IOMMU_DOMAIN_UNMANAGED) - return NULL; - - return __ipmmu_domain_alloc(type); -} - static void ipmmu_domain_free(struct iommu_domain *io_domain) { struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain); @@ -715,6 +710,8 @@ error: return ret; } +#if defined(CONFIG_ARM) && !defined(CONFIG_IOMMU_DMA) + static int ipmmu_add_device(struct device *dev) { struct ipmmu_vmsa_archdata *archdata; @@ -809,6 +806,14 @@ static void ipmmu_remove_device(struct d dev->archdata.iommu = NULL; } +static struct iommu_domain *ipmmu_domain_alloc(unsigned type) +{ + if (type != IOMMU_DOMAIN_UNMANAGED) + return NULL; + + return __ipmmu_domain_alloc(type); +} + static const struct iommu_ops ipmmu_ops = { .domain_alloc = ipmmu_domain_alloc, .domain_free = ipmmu_domain_free, @@ -823,6 +828,94 @@ static const struct iommu_ops ipmmu_ops .pgsize_bitmap = SZ_1G | SZ_2M | SZ_4K, }; +#endif /* !CONFIG_ARM && CONFIG_IOMMU_DMA */ + +#ifdef CONFIG_IOMMU_DMA + +static struct iommu_domain *ipmmu_domain_alloc_dma(unsigned type) +{ + struct iommu_domain *io_domain; + + if (type != IOMMU_DOMAIN_DMA) + return NULL; + + io_domain = __ipmmu_domain_alloc(type); + if (io_domain) + iommu_get_dma_cookie(io_domain); + + return io_domain; +} + +static void ipmmu_domain_free_dma(struct iommu_domain *io_domain) +{ + iommu_put_dma_cookie(io_domain); + ipmmu_domain_free(io_domain); +} + +static int ipmmu_add_device_dma(struct device *dev) +{ + struct iommu_group *group; + + /* only accept devices with iommus property */ + if (of_count_phandle_with_args(dev->of_node, "iommus", + "#iommu-cells") < 0) + return -ENODEV; + + group = iommu_group_get_for_dev(dev); + if (IS_ERR(group)) + return PTR_ERR(group); + + return 0; +} + +static void ipmmu_remove_device_dma(struct device *dev) +{ + iommu_group_remove_device(dev); +} + +static struct iommu_group *ipmmu_device_group_dma(struct device *dev) +{ + struct iommu_group *group; + int ret; + + group = generic_device_group(dev); + if (IS_ERR(group)) + return group; + + ret = ipmmu_init_platform_device(dev, group); + if (ret) { + iommu_group_put(group); + group = ERR_PTR(ret); + } + + return group; +} + +static int ipmmu_of_xlate_dma(struct device *dev, + struct of_phandle_args *spec) +{ + /* dummy callback to satisfy of_iommu_configure() */ + return 0; +} + +static const struct iommu_ops ipmmu_ops = { + .domain_alloc = ipmmu_domain_alloc_dma, + .domain_free = ipmmu_domain_free_dma, + .attach_dev = ipmmu_attach_device, + .detach_dev = ipmmu_detach_device, + .map = ipmmu_map, + .unmap = ipmmu_unmap, + .map_sg = default_iommu_map_sg, + .iova_to_phys = ipmmu_iova_to_phys, + .add_device = ipmmu_add_device_dma, + .remove_device = ipmmu_remove_device_dma, + .device_group = ipmmu_device_group_dma, + .pgsize_bitmap = SZ_1G | SZ_2M | SZ_4K, + .of_xlate = ipmmu_of_xlate_dma, +}; + +#endif /* CONFIG_IOMMU_DMA */ + /* ----------------------------------------------------------------------------- * Probe/remove and init */ @@ -912,7 +1005,9 @@ static int ipmmu_remove(struct platform_ list_del(&mmu->list); spin_unlock(&ipmmu_devices_lock); +#if defined(CONFIG_ARM) && !defined(CONFIG_IOMMU_DMA) arm_iommu_release_mapping(mmu->mapping); +#endif ipmmu_device_reset(mmu);