From patchwork Tue Jan 17 08:29:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 9520131 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 012396020B for ; Tue, 17 Jan 2017 08:29:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E550D20223 for ; Tue, 17 Jan 2017 08:29:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D927028504; Tue, 17 Jan 2017 08:29:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EA1C120223 for ; Tue, 17 Jan 2017 08:29:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751162AbdAQI3J (ORCPT ); Tue, 17 Jan 2017 03:29:09 -0500 Received: from galahad.ideasonboard.com ([185.26.127.97]:60531 "EHLO galahad.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751184AbdAQI3I (ORCPT ); Tue, 17 Jan 2017 03:29:08 -0500 Received: from avalon.bb.dnainternet.fi (dfj-tpyj40kccf8214dxy-3.rev.dnainternet.fi [IPv6:2001:14ba:21ff:600:f8f2:422:72d5:c0e6]) by galahad.ideasonboard.com (Postfix) with ESMTPSA id 05B962095D; Tue, 17 Jan 2017 09:28:32 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1484641713; bh=xe4lFyD0v4cnRJYpDbVG0iGkLwkLXFChknPzKdT04+c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ye9Wgr5Al2jojSuwDfF24eLrBRWCQz++e+9EropdZ2+34cuWHz1KtBMQU/Tw2y6ZP ya8AKg+RDz2eiHJ+K+Kbhzrz1y2ErY2urXNTqSYIsN/HAfPYYqDKa8KZkMM4WsPF6A rbobNypUoTIH0NYoqqapZA+mFE8ReedsOrsAIxsw= From: Laurent Pinchart To: dri-devel@lists.freedesktop.org Cc: linux-renesas-soc@vger.kernel.org, Andy Yan , Archit Taneja , Fabio Estevam , Jose Abreu , Kieran Bingham , Nickey Yang , Russell King , Vladimir Zapolskiy , Kieran Bingham Subject: [PATCH v3 11/20] drm: bridge: dw-hdmi: Remove PHY configuration resolution parameter Date: Tue, 17 Jan 2017 10:29:01 +0200 Message-Id: <20170117082910.27023-12-laurent.pinchart+renesas@ideasonboard.com> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170117082910.27023-1-laurent.pinchart+renesas@ideasonboard.com> References: <20170117082910.27023-1-laurent.pinchart+renesas@ideasonboard.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kieran Bingham The current code hard codes the call of hdmi_phy_configure() to be 8bpp and provides extraneous error checking to verify that this hardcoded value is correct. Simplify the implementation by removing the argument. Signed-off-by: Kieran Bingham Signed-off-by: Laurent Pinchart Reviewed-by: Jose Abreu --- drivers/gpu/drm/bridge/dw-hdmi.c | 27 +++++---------------------- 1 file changed, 5 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/bridge/dw-hdmi.c b/drivers/gpu/drm/bridge/dw-hdmi.c index 107fea49c4c6..b4fb0bd78910 100644 --- a/drivers/gpu/drm/bridge/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/dw-hdmi.c @@ -930,31 +930,14 @@ static void dw_hdmi_phy_sel_interface_control(struct dw_hdmi *hdmi, u8 enable) HDMI_PHY_CONF0_SELDIPIF_MASK); } -static int hdmi_phy_configure(struct dw_hdmi *hdmi, - unsigned char res, int cscon) +static int hdmi_phy_configure(struct dw_hdmi *hdmi, int cscon) { - unsigned res_idx; u8 val, msec; const struct dw_hdmi_plat_data *pdata = hdmi->plat_data; const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg; const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr; const struct dw_hdmi_phy_config *phy_config = pdata->phy_config; - switch (res) { - case 0: /* color resolution 0 is 8 bit colour depth */ - case 8: - res_idx = DW_HDMI_RES_8; - break; - case 10: - res_idx = DW_HDMI_RES_10; - break; - case 12: - res_idx = DW_HDMI_RES_12; - break; - default: - return -EINVAL; - } - /* PLL/MPLL Cfg - always match on final entry */ for (; mpll_config->mpixelclock != ~0UL; mpll_config++) if (hdmi->hdmi_data.video_mode.mpixelclock <= @@ -1004,11 +987,11 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, HDMI_PHY_I2CM_SLAVE_ADDR); hdmi_phy_test_clear(hdmi, 0); - hdmi_phy_i2c_write(hdmi, mpll_config->res[res_idx].cpce, 0x06); - hdmi_phy_i2c_write(hdmi, mpll_config->res[res_idx].gmp, 0x15); + hdmi_phy_i2c_write(hdmi, mpll_config->res[0].cpce, 0x06); + hdmi_phy_i2c_write(hdmi, mpll_config->res[0].gmp, 0x15); /* CURRCTRL */ - hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[res_idx], 0x10); + hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[0], 0x10); hdmi_phy_i2c_write(hdmi, 0x0000, 0x13); /* PLLPHBYCTRL */ hdmi_phy_i2c_write(hdmi, 0x0006, 0x17); @@ -1068,7 +1051,7 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi) dw_hdmi_phy_enable_powerdown(hdmi, true); /* Enable CSC */ - ret = hdmi_phy_configure(hdmi, 8, cscon); + ret = hdmi_phy_configure(hdmi, cscon); if (ret) return ret; }