From patchwork Tue Jan 17 19:59:39 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Brandt X-Patchwork-Id: 9521829 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3856660244 for ; Tue, 17 Jan 2017 20:01:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0523927F86 for ; Tue, 17 Jan 2017 20:01:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EDE4B28562; Tue, 17 Jan 2017 20:01:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7775027F86 for ; Tue, 17 Jan 2017 20:01:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751246AbdAQUBI (ORCPT ); Tue, 17 Jan 2017 15:01:08 -0500 Received: from relmlor1.renesas.com ([210.160.252.171]:24581 "EHLO relmlie4.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750991AbdAQUAQ (ORCPT ); Tue, 17 Jan 2017 15:00:16 -0500 Received: from unknown (HELO relmlir1.idc.renesas.com) ([10.200.68.151]) by relmlie4.idc.renesas.com with ESMTP; 18 Jan 2017 05:00:02 +0900 Received: from relmlac4.idc.renesas.com (relmlac4.idc.renesas.com [10.200.69.24]) by relmlir1.idc.renesas.com (Postfix) with ESMTP id 455F949E39; Wed, 18 Jan 2017 05:00:02 +0900 (JST) Received: by relmlac4.idc.renesas.com (Postfix, from userid 0) id 07BC348014; Wed, 18 Jan 2017 05:00:01 +0900 (JST) Received: from relmlac4.idc.renesas.com (localhost [127.0.0.1]) by relmlac4.idc.renesas.com (Postfix) with ESMTP id E5B7F480A6; Wed, 18 Jan 2017 05:00:01 +0900 (JST) Received: from relmlii1.idc.renesas.com [10.200.68.65] by relmlac4.idc.renesas.com with ESMTP id FAB17353; Wed, 18 Jan 2017 05:00:01 +0900 X-IronPort-AV: E=Sophos;i="5.33,246,1477926000"; d="scan'208";a="230955204" Received: from unknown (HELO rtamta01.rta.renesas.com) ([143.103.48.75]) by relmlii1.idc.renesas.com with ESMTP; 18 Jan 2017 05:00:00 +0900 Received: from localhost.localdomain (unknown [172.27.49.212]) by rtamta01.rta.renesas.com (Postfix) with ESMTP id 3C4D0393; Tue, 17 Jan 2017 19:59:56 +0000 (UTC) From: Chris Brandt To: Ulf Hansson , Rob Herring , Mark Rutland , Simon Horman , Wolfram Sang , Geert Uytterhoeven Cc: devicetree@vger.kernel.org, linux-mmc@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Chris Brandt Subject: [PATCH v2 2/3] mmc: sh_mobile_sdhi: explain clock bindings Date: Tue, 17 Jan 2017 14:59:39 -0500 Message-Id: <20170117195940.25092-3-chris.brandt@renesas.com> X-Mailer: git-send-email 2.10.1 In-Reply-To: <20170117195940.25092-1-chris.brandt@renesas.com> References: <20170117195940.25092-1-chris.brandt@renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In the case of a single clock source, you don't need names. However, if the controller has 2 clock sources, you need to name them correctly so the driver can find the 2nd one. Signed-off-by: Chris Brandt --- Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt index a1650ed..258b98c 100644 --- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt +++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt @@ -25,8 +25,29 @@ Required properties: "renesas,sdhi-r8a7795" - SDHI IP on R8A7795 SoC "renesas,sdhi-r8a7796" - SDHI IP on R8A7796 SoC +- clocks: Most controllers only have 1 clock source per cahnnel. However, some + have 2. If 2 clocks are specified, you must name them as "core" and + "carddetect". If the controller only has 1 clock, naming is not + required. + Optional properties: - toshiba,mmc-wrprotect-disable: write-protect detection is unavailable - pinctrl-names: should be "default", "state_uhs" - pinctrl-0: should contain default/high speed pin ctrl - pinctrl-1: should contain uhs mode pin ctrl + +Example showing 2 clocks: + sdhi0: sd@e804e000 { + compatible = "renesas,sdhi-r7s72100"; + reg = <0xe804e000 0x100>; + interrupts = ; + + clocks = <&mstp12_clks R7S72100_CLK_SDHI00>, + <&mstp12_clks R7S72100_CLK_SDHI01>; + clock-names = "core", "carddetect"; + cap-sd-highspeed; + cap-sdio-irq; + status = "disabled"; + };