| Message ID | 20170120212055.4157-3-chris.brandt@renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Simon Horman |
| Headers | show |
Hello! On 1/21/2017 12:20 AM, Chris Brandt wrote: > Signed-off-by: Chris Brandt <chris.brandt@renesas.com> > --- > v2: > * wrap clock lines to avoid 80 char max > * split into 2 separate channel nodes > --- > arch/arm/boot/dts/r7s72100.dtsi | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi > index d5946df..47b2165 100644 > --- a/arch/arm/boot/dts/r7s72100.dtsi > +++ b/arch/arm/boot/dts/r7s72100.dtsi > @@ -505,4 +505,20 @@ > cap-sdio-irq; > status = "disabled"; > }; > + > + ostm0: ostm@fcfec000 { According to devicetree.org, the node name should be generic, i.e. "timer@...". > + compatible = "renesas,r7s72100-ostm", "renesas,ostm"; > + reg = <0xfcfec000 0x30>; > + interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>; > + clocks = <&mstp5_clks R7S72100_CLK_OSTM0>; > + status = "disabled"; > + }; > + > + ostm1: ostm@fcfec400 { Likewise. > + compatible = "renesas,r7s72100-ostm", "renesas,ostm"; > + reg = <0xfcfec400 0x30>; > + interrupts = <GIC_SPI 103 IRQ_TYPE_EDGE_RISING>; > + clocks = <&mstp5_clks R7S72100_CLK_OSTM1>; > + status = "disabled"; > + }; > }; MBR, Sergei
On Fri, Jan 20, 2017 at 10:20 PM, Chris Brandt <chris.brandt@renesas.com> wrote: > Signed-off-by: Chris Brandt <chris.brandt@renesas.com> > --- > v2: > * wrap clock lines to avoid 80 char max > * split into 2 separate channel nodes > --- > arch/arm/boot/dts/r7s72100.dtsi | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi > index d5946df..47b2165 100644 > --- a/arch/arm/boot/dts/r7s72100.dtsi > +++ b/arch/arm/boot/dts/r7s72100.dtsi > @@ -505,4 +505,20 @@ > cap-sdio-irq; > status = "disabled"; > }; > + > + ostm0: ostm@fcfec000 { > + compatible = "renesas,r7s72100-ostm", "renesas,ostm"; > + reg = <0xfcfec000 0x30>; > + interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>; > + clocks = <&mstp5_clks R7S72100_CLK_OSTM0>; Missing power-domains property: power-domains = <&cpg_clocks>; > + status = "disabled"; > + }; > + > + ostm1: ostm@fcfec400 { > + compatible = "renesas,r7s72100-ostm", "renesas,ostm"; > + reg = <0xfcfec400 0x30>; > + interrupts = <GIC_SPI 103 IRQ_TYPE_EDGE_RISING>; > + clocks = <&mstp5_clks R7S72100_CLK_OSTM1>; Likewise. BTW, they're also missing for the last added device nodes (MMC and SDHI). > + status = "disabled"; > + }; > }; Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hello Sergei, On Saturday, January 21, 2017, Sergei Shtylyov wrote: > > diff --git a/arch/arm/boot/dts/r7s72100.dtsi > > b/arch/arm/boot/dts/r7s72100.dtsi index d5946df..47b2165 100644 > > --- a/arch/arm/boot/dts/r7s72100.dtsi > > +++ b/arch/arm/boot/dts/r7s72100.dtsi > > @@ -505,4 +505,20 @@ > > cap-sdio-irq; > > status = "disabled"; > > }; > > + > > + ostm0: ostm@fcfec000 { > > According to devicetree.org, the node name should be generic, i.e. > "timer@...". > > > + compatible = "renesas,r7s72100-ostm", "renesas,ostm"; > > + reg = <0xfcfec000 0x30>; > > + interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>; > > + clocks = <&mstp5_clks R7S72100_CLK_OSTM0>; > > + status = "disabled"; > > + }; > > + > > + ostm1: ostm@fcfec400 { > > Likewise. > OK. I will change it. Thank you! Chris
Hello Geert, On Sunday, January 22, 2017, Geert Uytterhoeven wrote: > > diff --git a/arch/arm/boot/dts/r7s72100.dtsi > > b/arch/arm/boot/dts/r7s72100.dtsi index d5946df..47b2165 100644 > > --- a/arch/arm/boot/dts/r7s72100.dtsi > > +++ b/arch/arm/boot/dts/r7s72100.dtsi > > @@ -505,4 +505,20 @@ > > cap-sdio-irq; > > status = "disabled"; > > }; > > + > > + ostm0: ostm@fcfec000 { > > + compatible = "renesas,r7s72100-ostm", "renesas,ostm"; > > + reg = <0xfcfec000 0x30>; > > + interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>; > > + clocks = <&mstp5_clks R7S72100_CLK_OSTM0>; > > Missing power-domains property: > > power-domains = <&cpg_clocks>; > > > + status = "disabled"; > > + }; > > + > > + ostm1: ostm@fcfec400 { > > + compatible = "renesas,r7s72100-ostm", "renesas,ostm"; > > + reg = <0xfcfec400 0x30>; > > + interrupts = <GIC_SPI 103 IRQ_TYPE_EDGE_RISING>; > > + clocks = <&mstp5_clks R7S72100_CLK_OSTM1>; > > Likewise. OK. Thank you. > BTW, they're also missing for the last added device nodes (MMC and SDHI). OK, I will submit patches for them as well. Thank you for the review. Chris
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi index d5946df..47b2165 100644 --- a/arch/arm/boot/dts/r7s72100.dtsi +++ b/arch/arm/boot/dts/r7s72100.dtsi @@ -505,4 +505,20 @@ cap-sdio-irq; status = "disabled"; }; + + ostm0: ostm@fcfec000 { + compatible = "renesas,r7s72100-ostm", "renesas,ostm"; + reg = <0xfcfec000 0x30>; + interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>; + clocks = <&mstp5_clks R7S72100_CLK_OSTM0>; + status = "disabled"; + }; + + ostm1: ostm@fcfec400 { + compatible = "renesas,r7s72100-ostm", "renesas,ostm"; + reg = <0xfcfec400 0x30>; + interrupts = <GIC_SPI 103 IRQ_TYPE_EDGE_RISING>; + clocks = <&mstp5_clks R7S72100_CLK_OSTM1>; + status = "disabled"; + }; };
Signed-off-by: Chris Brandt <chris.brandt@renesas.com> --- v2: * wrap clock lines to avoid 80 char max * split into 2 separate channel nodes --- arch/arm/boot/dts/r7s72100.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)