From patchwork Fri Jan 27 18:19:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Brandt X-Patchwork-Id: 9542491 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C6F75604A0 for ; Fri, 27 Jan 2017 18:25:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BA41726E91 for ; Fri, 27 Jan 2017 18:25:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AEDEC27F93; Fri, 27 Jan 2017 18:25:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4135F26E91 for ; Fri, 27 Jan 2017 18:25:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750832AbdA0SWq (ORCPT ); Fri, 27 Jan 2017 13:22:46 -0500 Received: from relmlor1.renesas.com ([210.160.252.171]:26798 "EHLO relmlie4.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750796AbdA0SWR (ORCPT ); Fri, 27 Jan 2017 13:22:17 -0500 Received: from unknown (HELO relmlir2.idc.renesas.com) ([10.200.68.152]) by relmlie4.idc.renesas.com with ESMTP; 28 Jan 2017 03:20:11 +0900 Received: from relmlac3.idc.renesas.com (relmlac3.idc.renesas.com [10.200.69.23]) by relmlir2.idc.renesas.com (Postfix) with ESMTP id DF8B44DDBD; Sat, 28 Jan 2017 03:20:11 +0900 (JST) Received: by relmlac3.idc.renesas.com (Postfix, from userid 0) id D988918070; Sat, 28 Jan 2017 03:20:11 +0900 (JST) Received: from relmlac3.idc.renesas.com (localhost [127.0.0.1]) by relmlac3.idc.renesas.com (Postfix) with ESMTP id D4B4E1806F; Sat, 28 Jan 2017 03:20:11 +0900 (JST) Received: from relmlii1.idc.renesas.com [10.200.68.65] by relmlac3.idc.renesas.com with ESMTP id DAH30067; Sat, 28 Jan 2017 03:20:11 +0900 X-IronPort-AV: E=Sophos;i="5.33,296,1477926000"; d="scan'208";a="232046352" Received: from unknown (HELO rtamta01.rta.renesas.com) ([143.103.48.75]) by relmlii1.idc.renesas.com with ESMTP; 28 Jan 2017 03:20:10 +0900 Received: from localhost.localdomain (unknown [172.27.49.212]) by rtamta01.rta.renesas.com (Postfix) with ESMTP id 878A33B9; Fri, 27 Jan 2017 18:20:05 +0000 (UTC) From: Chris Brandt To: Geert Uytterhoeven , Michael Turquette , Stephen Boyd , Kuninori Morimoto Cc: Simon Horman , Jacopo Mondi , linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Chris Brandt Subject: [PATCH] clk: renesas: mstp: ensure register writes complete before returning Date: Fri, 27 Jan 2017 13:19:50 -0500 Message-Id: <20170127181950.22165-1-chris.brandt@renesas.com> X-Mailer: git-send-email 2.10.1 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When there is no status bit, it is possible for the clock enable/disable operation to have not completed by the time the driver code resumes execution. This is due to the fact that write operations are sometimes queued and delayed internally. Doing a read ensures the write operations has completed. Signed-off-by: Chris Brandt --- drivers/clk/renesas/clk-mstp.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/clk/renesas/clk-mstp.c b/drivers/clk/renesas/clk-mstp.c index 3ce819c..69cfdb9 100644 --- a/drivers/clk/renesas/clk-mstp.c +++ b/drivers/clk/renesas/clk-mstp.c @@ -91,6 +91,12 @@ static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable) value |= bitmask; cpg_mstp_write(group, value, group->smstpcr); + if (!group->mstpsr) { + /* dummy read to ensure write has completed */ + clk_readl(group->smstpcr); + barrier_data(group->smstpcr); + } + spin_unlock_irqrestore(&group->lock, flags); if (!enable || !group->mstpsr)