| Message ID | 20170213184405.5657-1-chris.brandt@renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
Hi Chris, On Mon, Feb 13, 2017 at 7:44 PM, Chris Brandt <chris.brandt@renesas.com> wrote: > When there is no status bit, it is possible for the clock enable/disable > operation to have not completed by the time the driver code resumes > execution. This is due to the fact that write operations are sometimes > queued and delayed internally. Doing a read ensures the write operations > has completed. > > Fixes: b6face404f38 ("ARM: shmobile: r7s72100: add essential clock nodes to dtsi") > Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Thanks! Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> I've regression-tested your patch on R-Car Gen1 (r8a7778/bock-w), which also doesn't have status bits for some module clocks, and its SPI FLASH is still identified. Mike/Stephen: As this is a fix, can you please take it directly? Thanks! Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
diff --git a/drivers/clk/renesas/clk-mstp.c b/drivers/clk/renesas/clk-mstp.c index 3ce819c..69cfdb9 100644 --- a/drivers/clk/renesas/clk-mstp.c +++ b/drivers/clk/renesas/clk-mstp.c @@ -91,6 +91,12 @@ static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable) value |= bitmask; cpg_mstp_write(group, value, group->smstpcr); + if (!group->mstpsr) { + /* dummy read to ensure write has completed */ + clk_readl(group->smstpcr); + barrier_data(group->smstpcr); + } + spin_unlock_irqrestore(&group->lock, flags); if (!enable || !group->mstpsr)
When there is no status bit, it is possible for the clock enable/disable operation to have not completed by the time the driver code resumes execution. This is due to the fact that write operations are sometimes queued and delayed internally. Doing a read ensures the write operations has completed. Fixes: b6face404f38 ("ARM: shmobile: r7s72100: add essential clock nodes to dtsi") Signed-off-by: Chris Brandt <chris.brandt@renesas.com> --- v2: * add Fixes because technically this is a bug fix --- drivers/clk/renesas/clk-mstp.c | 6 ++++++ 1 file changed, 6 insertions(+)