| Message ID | 20170426100538.22060-2-horms+renesas@verge.net.au (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 6559b3915592b32fc43f78ef7ae04f614595a6cf |
| Delegated to: | Simon Horman |
| Headers | show |
diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi index 0124faf175c8..42ea246e71cb 100644 --- a/arch/arm/boot/dts/emev2.dtsi +++ b/arch/arm/boot/dts/emev2.dtsi @@ -197,7 +197,7 @@ clock-names = "sclk"; }; - pfc: pfc@e0140200 { + pfc: pin-controller@e0140200 { compatible = "renesas,pfc-emev2"; reg = <0xe0140200 0x100>; };
The device trees for Renesas SoCs use either pfc or pin-controller as the node name for the PFC device. This patch is intended to take a step towards unifying the node name used as pin-controller which appears to be the more generic of the two and thus more in keeping with the DT specs. My analysis is that this is a user-visible change to the extent that kernel logs, and sysfs entries change from e0140200.pfc and pfc@e0140200 to e0140200.pin-controller and pin-controller@e0140200. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> --- arch/arm/boot/dts/emev2.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)