diff mbox

[v4,01/15] arm64: dts: renesas: r8a7795: Add IPMMU device nodes

Message ID 20171101103452.7491-2-horms+renesas@verge.net.au (mailing list archive)
State Superseded
Delegated to: Simon Horman
Headers show

Commit Message

Simon Horman Nov. 1, 2017, 10:34 a.m. UTC 
From: Magnus Damm <damm+renesas@opensource.se>

Add r8a7795 IPMMU nodes and keep all disabled by default.

This includes all IPMMU devices for r8a7795 ES2.0. Those
not present in r8a7795 ES1.x are removed from the DT for those
SoCs using delete-node. A follow-up patch will add IPMMU devices
to ES1.x which are not also present in ES2.0.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v4 [Simon Horman]
* Add IPMMU-VI1, IPMMU-VP1 IPMMU-PV2 and IPMMU-PV3
* Rename IPMMU-VP as IPMMU-VP0 and IPMMU-VI as IPMMU-VI0
  as per recent datasheet naming
* Do not add IPMMU-MP1 or IPMMU-SY,
  these will be added to ES1.x by follow-up patch

v1 - v3 [Magnus Damm]
---
 arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi |  21 +++++
 arch/arm64/boot/dts/renesas/r8a7795.dtsi     | 127 +++++++++++++++++++++++++++
 2 files changed, 148 insertions(+)

Comments

Geert Uytterhoeven Nov. 7, 2017, 9:11 a.m. UTC | #1 
Hi Simon,

On Wed, Nov 1, 2017 at 11:34 AM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> From: Magnus Damm <damm+renesas@opensource.se>
>
> Add r8a7795 IPMMU nodes and keep all disabled by default.
>
> This includes all IPMMU devices for r8a7795 ES2.0. Those
> not present in r8a7795 ES1.x are removed from the DT for those
> SoCs using delete-node. A follow-up patch will add IPMMU devices
> to ES1.x which are not also present in ES2.0.
>
> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
> @@ -86,6 +91,22 @@
>         };
>  };
>
> +&ipmmu_vi0 {
> +       renesas,ipmmu-main = <&ipmmu_mm 11>;
> +};
> +
> +&ipmmu_vp0 {
> +       renesas,ipmmu-main = <&ipmmu_mm 12>;
> +};
> +
> +&ipmmu_vc0 {
> +       renesas,ipmmu-main = <&ipmmu_mm 12>;

Should be 9.

> +};

Missing override:

    &ipmmu_vc1 {
            renesas,ipmmu-main = <&ipmmu_mm 10>;
    }

> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> @@ -421,6 +421,133 @@
>                         resets = <&cpg 407>;
>                 };
>
> +               ipmmu_vi0: mmu@febd0000 {
> +                       compatible = "renesas,ipmmu-r8a7795";
> +                       reg = <0 0xfebd0000 0 0x1000>; /* IPMMU-VI0 */

Given the label names, do we need comments like "IPMMU-VI0"?

> +               ipmmu_vp0: mmu@fe990000 {
> +                       compatible = "renesas,ipmmu-r8a7795";
> +                       reg = <0 0xfe990000 0 0x1000>; /* IPMMU-VP0 */
> +                       renesas,ipmmu-main = <&ipmmu_mm 16>;
> +                       #iommu-cells = <1>;

According to Table 16.2, some IPMMU instances (e.g VP0) are part of a power
domain.  While I doubt the kernel code handles that correctly, it should be
described in DT nevertheless.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Simon Horman Nov. 10, 2017, 11:08 a.m. UTC | #2 
On Tue, Nov 07, 2017 at 10:11:56AM +0100, Geert Uytterhoeven wrote:
> Hi Simon,
> 
> On Wed, Nov 1, 2017 at 11:34 AM, Simon Horman
> <horms+renesas@verge.net.au> wrote:
> > From: Magnus Damm <damm+renesas@opensource.se>
> >
> > Add r8a7795 IPMMU nodes and keep all disabled by default.
> >
> > This includes all IPMMU devices for r8a7795 ES2.0. Those
> > not present in r8a7795 ES1.x are removed from the DT for those
> > SoCs using delete-node. A follow-up patch will add IPMMU devices
> > to ES1.x which are not also present in ES2.0.
> >
> > Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
> > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> 
> Thanks for your patch!
> 
> > --- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
> > @@ -86,6 +91,22 @@
> >         };
> >  };
> >
> > +&ipmmu_vi0 {
> > +       renesas,ipmmu-main = <&ipmmu_mm 11>;
> > +};
> > +
> > +&ipmmu_vp0 {
> > +       renesas,ipmmu-main = <&ipmmu_mm 12>;
> > +};
> > +
> > +&ipmmu_vc0 {
> > +       renesas,ipmmu-main = <&ipmmu_mm 12>;
> 
> Should be 9.

Thanks, it looks like I made a copy-paste error.

> 
> > +};
> 
> Missing override:
> 
>     &ipmmu_vc1 {
>             renesas,ipmmu-main = <&ipmmu_mm 10>;
>     }

Thanks, added.

> 
> > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > @@ -421,6 +421,133 @@
> >                         resets = <&cpg 407>;
> >                 };
> >
> > +               ipmmu_vi0: mmu@febd0000 {
> > +                       compatible = "renesas,ipmmu-r8a7795";
> > +                       reg = <0 0xfebd0000 0 0x1000>; /* IPMMU-VI0 */
> 
> Given the label names, do we need comments like "IPMMU-VI0"?

Thanks, I will drop them.

> 
> > +               ipmmu_vp0: mmu@fe990000 {
> > +                       compatible = "renesas,ipmmu-r8a7795";
> > +                       reg = <0 0xfe990000 0 0x1000>; /* IPMMU-VP0 */
> > +                       renesas,ipmmu-main = <&ipmmu_mm 16>;
> > +                       #iommu-cells = <1>;
> 
> According to Table 16.2, some IPMMU instances (e.g VP0) are part of a power
> domain.  While I doubt the kernel code handles that correctly, it should be
> described in DT nevertheless.

Thanks, will do.
diff mbox

Patch

diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
index 655dd30639c5..02d505f2e0e5 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
@@ -21,6 +21,11 @@ 
 		status = "disabled";
 	};
 
+	/delete-node/ mmu@febe0000;
+	/delete-node/ mmu@fe980000;
+	/delete-node/ mmu@fd960000;
+	/delete-node/ mmu@fd970000;
+
 	/delete-node/ usb-phy@ee0e0200;
 	/delete-node/ usb@ee0e0100;
 	/delete-node/ usb@ee0e0000;
@@ -86,6 +91,22 @@ 
 	};
 };
 
+&ipmmu_vi0 {
+	renesas,ipmmu-main = <&ipmmu_mm 11>;
+};
+
+&ipmmu_vp0 {
+	renesas,ipmmu-main = <&ipmmu_mm 12>;
+};
+
+&ipmmu_vc0 {
+	renesas,ipmmu-main = <&ipmmu_mm 12>;
+};
+
+&ipmmu_rt {
+	renesas,ipmmu-main = <&ipmmu_mm 7>;
+};
+
 &du {
 	vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;
 };
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 42c51f2ec30b..9750881c90a6 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -421,6 +421,133 @@ 
 			resets = <&cpg 407>;
 		};
 
+		ipmmu_vi0: mmu@febd0000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xfebd0000 0 0x1000>; /* IPMMU-VI0 */
+			renesas,ipmmu-main = <&ipmmu_mm 14>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_vi1: mmu@febe0000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xfebe0000 0 0x1000>; /* IPMMU-VI1 */
+			renesas,ipmmu-main = <&ipmmu_mm 15>;
+			#iommu-cells = <1>;
+		};
+
+		ipmmu_vp0: mmu@fe990000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xfe990000 0 0x1000>; /* IPMMU-VP0 */
+			renesas,ipmmu-main = <&ipmmu_mm 16>;
+			#iommu-cells = <1>;
+		};
+
+		ipmmu_vp1: mmu@fe980000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xfe980000 0 0x1000>; /* IPMMU-VP1 */
+			renesas,ipmmu-main = <&ipmmu_mm 17>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_vc0: mmu@fe6b0000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xfe6b0000 0 0x1000>; /* IPMMU-VC0 */
+			renesas,ipmmu-main = <&ipmmu_mm 12>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_vc1: mmu@fe6f0000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xfe6f0000 0 0x1000>; /* IPMMU-VC1 */
+			renesas,ipmmu-main = <&ipmmu_mm 13>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_pv0: mmu@fd800000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xfd800000 0 0x1000>; /* IPMMU-PV0 */
+			renesas,ipmmu-main = <&ipmmu_mm 6>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_pv2: mmu@fd960000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xfd960000 0 0x1000>; /* IPMMU-PV2 */
+			renesas,ipmmu-main = <&ipmmu_mm 8>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_pv3: mmu@fd970000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xfd970000 0 0x1000>; /* IPMMU-PV3 */
+			renesas,ipmmu-main = <&ipmmu_mm 9>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_ir: mmu@ff8b0000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xff8b0000 0 0x1000>; /* IPMMU-IR */
+			renesas,ipmmu-main = <&ipmmu_mm 3>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_hc: mmu@e6570000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xe6570000 0 0x1000>; /* IPMMU-HC */
+			renesas,ipmmu-main = <&ipmmu_mm 2>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_rt: mmu@ffc80000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xffc80000 0 0x1000>; /* IPMMU-RT */
+			renesas,ipmmu-main = <&ipmmu_mm 10>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_mp0: mmu@ec670000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xec670000 0 0x1000>; /* IPMMU-MP0 */
+			renesas,ipmmu-main = <&ipmmu_mm 4>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_ds0: mmu@e6740000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xe6740000 0 0x1000>; /* IPMMU-DS0 */
+			renesas,ipmmu-main = <&ipmmu_mm 0>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_ds1: mmu@e7740000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xe7740000 0 0x1000>; /* IPMMU-DS1 */
+			renesas,ipmmu-main = <&ipmmu_mm 1>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
+		ipmmu_mm: mmu@e67b0000 {
+			compatible = "renesas,ipmmu-r8a7795";
+			reg = <0 0xe67b0000 0 0x1000>; /* IPMMU-MM */
+			interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
 		dmac0: dma-controller@e6700000 {
 			compatible = "renesas,dmac-r8a7795",
 				     "renesas,rcar-dmac";