From patchwork Wed Dec 20 10:01:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 10125375 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 666696019C for ; Wed, 20 Dec 2017 10:01:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 72B252922F for ; Wed, 20 Dec 2017 10:01:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 676C4296D9; Wed, 20 Dec 2017 10:01:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0CF6F2922F for ; Wed, 20 Dec 2017 10:01:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755064AbdLTKBv (ORCPT ); Wed, 20 Dec 2017 05:01:51 -0500 Received: from kirsty.vergenet.net ([202.4.237.240]:53406 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754940AbdLTKBg (ORCPT ); Wed, 20 Dec 2017 05:01:36 -0500 Received: from penelope.horms.nl (52D9BC73.cm-11-1c.dynamic.ziggo.nl [82.217.188.115]) by kirsty.vergenet.net (Postfix) with ESMTPA id 446B125BE9A; Wed, 20 Dec 2017 21:01:34 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1513764094; bh=6jCxS/8daH9StQHAoNzknI3eA27sL1OfKn3U6oI+Itc=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=oCEr6ujGvkaEx112SkZspLVdVWZ5OfDU6J0Rr25cIu3783sFqT/MZAJMtjnyhZ5+i UiNIMZte/kjx6jSB4tc27r4m7OWoJLWnG1e+nX0SSep2JEd2LokhseHTSCw/B2J2NX hvss8AQu2OcDvbQUm7YvllxF27/oDiAS60TKF42E= Received: by penelope.horms.nl (Postfix, from userid 7100) id 078DCE20649; Wed, 20 Dec 2017 11:01:32 +0100 (CET) Date: Wed, 20 Dec 2017 11:01:32 +0100 From: Simon Horman To: Geert Uytterhoeven Cc: Linux-Renesas , linux-arm-kernel@lists.infradead.org, Magnus Damm Subject: Re: [PATCH v2 1/2] ARM: dts: r8a7743: sort root sub-nodes alphabetically Message-ID: <20171220100131.u5bjyce3mp2rj7cx@verge.net.au> References: <20171218214043.10796-1-horms+renesas@verge.net.au> <20171218214043.10796-2-horms+renesas@verge.net.au> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Organisation: Horms Solutions BV User-Agent: NeoMutt/20170113 (1.7.2) Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Tue, Dec 19, 2017 at 09:43:06AM +0100, Geert Uytterhoeven wrote: > Hi Simon, > > On Mon, Dec 18, 2017 at 10:40 PM, Simon Horman > wrote: > > Sort root sub-nodes alphabetically for allow for easier maintenance > > to allow for > > > of this file. > > > > Signed-off-by: Simon Horman > > Reviewed-by: Geert Uytterhoeven > > > --- a/arch/arm/boot/dts/r8a7743.dtsi > > +++ b/arch/arm/boot/dts/r8a7743.dtsi > > > cpus { > > #address-cells = <1>; > > #size-cells = <0>; > > @@ -79,6 +102,37 @@ > > }; > > }; > > > > + /* External CAN clock */ > > + can_clk: can { > > Doesn't look alphabetically to me... Thanks, I have applied the following: From: Simon Horman Subject: [PATCH] ARM: dts: r8a7743: sort root sub-nodes alphabetically Sort root sub-nodes alphabetically to allow for easier maintenance of this file. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7743.dtsi | 100 ++++++++++++++++++++++------------------- 1 file changed, 54 insertions(+), 46 deletions(-) diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi index f24f36d50e40..067e339f6646 100644 --- a/arch/arm/boot/dts/r8a7743.dtsi +++ b/arch/arm/boot/dts/r8a7743.dtsi @@ -37,6 +37,37 @@ vin2 = &vin2; }; + /* + * The external audio clocks are configured as 0 Hz fixed frequency + * clocks by default. + * Boards that provide audio clocks should override them. + */ + audio_clk_a: audio_clk_a { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + audio_clk_b: audio_clk_b { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + audio_clk_c: audio_clk_c { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + /* External CAN clock */ + can_clk: can { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -79,6 +110,29 @@ }; }; + /* External root clock */ + extal_clk: extal { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + }; + + /* External PCIe clock - can be overridden by the board */ + pcie_bus_clk: pcie_bus { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + /* External SCIF clock */ + scif_clk: scif { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + }; + soc { compatible = "simple-bus"; interrupt-parent = <&gic>; @@ -1629,56 +1683,10 @@ clock-frequency = <0>; }; - /* - * The external audio clocks are configured as 0 Hz fixed frequency - * clocks by default. - * Boards that provide audio clocks should override them. - */ - audio_clk_a: audio_clk_a { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - audio_clk_b: audio_clk_b { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - audio_clk_c: audio_clk_c { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - /* External USB clock - can be overridden by the board */ usb_extal_clk: usb_extal { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <48000000>; }; - - /* External CAN clock */ - can_clk: can { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board. */ - clock-frequency = <0>; - }; - - /* External PCIe clock - can be overridden by the board */ - pcie_bus_clk: pcie_bus { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - /* External SCIF clock */ - scif_clk: scif { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board. */ - clock-frequency = <0>; - }; };