| Message ID | 20180208154720.5766-2-niklas.soderlund+renesas@ragnatech.se (mailing list archive) |
|---|---|
| State | Changes Requested |
| Commit | dbd94068717c840846cf38b5cc05383857e9f4ef |
| Delegated to: | Simon Horman |
| Headers | show |
Hi Niklas, and Sergei, On 08/02/18 15:47, Niklas Söderlund wrote: > From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> > > Describe FCPVD0 in the R8A77970 device tree; it will be used by VSPD0 in > the next patch... > > Based on the original (and large) patch by Daisuke Matsushita > <daisuke.matsushita.ns@hitachi.com>. > > Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> > Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Register address and CPG verified: Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> > --- > arch/arm64/boot/dts/renesas/r8a77970.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi > index 13c88414cb432b1a..2567e68fe0c6cf7b 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi > @@ -612,6 +612,14 @@ > #address-cells = <1>; > #size-cells = <0>; > }; > + > + fcpvd0: fcp@fea27000 { > + compatible = "renesas,fcpv"; > + reg = <0 0xfea27000 0 0x200>; > + clocks = <&cpg CPG_MOD 603>; > + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; > + resets = <&cpg 603>; > + }; > }; > > timer { >
On Thu, Feb 08, 2018 at 04:47:16PM +0100, Niklas Söderlund wrote: > From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> > > Describe FCPVD0 in the R8A77970 device tree; it will be used by VSPD0 in > the next patch... > > Based on the original (and large) patch by Daisuke Matsushita > <daisuke.matsushita.ns@hitachi.com>. > > Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> > Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> > --- > arch/arm64/boot/dts/renesas/r8a77970.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi > index 13c88414cb432b1a..2567e68fe0c6cf7b 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi > @@ -612,6 +612,14 @@ > #address-cells = <1>; > #size-cells = <0>; > }; > + > + fcpvd0: fcp@fea27000 { > + compatible = "renesas,fcpv"; > + reg = <0 0xfea27000 0 0x200>; > + clocks = <&cpg CPG_MOD 603>; > + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; > + resets = <&cpg 603>; Any reason the following is omitted? iommus = <&ipmmu_vi0 8>; > + }; > }; > > timer { > -- > 2.16.1 >
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi index 13c88414cb432b1a..2567e68fe0c6cf7b 100644 --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi @@ -612,6 +612,14 @@ #address-cells = <1>; #size-cells = <0>; }; + + fcpvd0: fcp@fea27000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea27000 0 0x200>; + clocks = <&cpg CPG_MOD 603>; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 603>; + }; }; timer {