| Message ID | 20180406191438.3630-4-laurent.pinchart+renesas@ideasonboard.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
Hi Laurent, Thanks for your work. On 2018-04-06 22:14:38 +0300, Laurent Pinchart wrote: > The internal LVDS encoder now has DT bindings separate from the DU. Port > the device tree over to the new model. > > Fixes: c6a27fa41fab ("drm: rcar-du: Convert LVDS encoder code to bridge driver") > Fixes: bff8f8c2feb7 ("ARM: dts: r8a7793: add soc node") > Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> > --- > Changes since v3: > > - Added power-domains and resets properties to LVDS nodes > > Changes since v2: > > - Fixed LVDS compatible string > > Changes since v1: > > - Remove the DU reg-names property > --- > arch/arm/boot/dts/r8a7793-gose.dts | 10 +++++++--- > arch/arm/boot/dts/r8a7793.dtsi | 37 +++++++++++++++++++++++++++++++------ > 2 files changed, 38 insertions(+), 9 deletions(-) > > diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts > index 9ed6961f2d9a..96e117d8b2cc 100644 > --- a/arch/arm/boot/dts/r8a7793-gose.dts > +++ b/arch/arm/boot/dts/r8a7793-gose.dts > @@ -447,10 +447,9 @@ > pinctrl-names = "default"; > status = "okay"; > > - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 726>, > + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, > <&x13_clk>, <&x2_clk>; > - clock-names = "du.0", "du.1", "lvds.0", > - "dclkin.0", "dclkin.1"; > + clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1"; > > ports { > port@0 { > @@ -458,6 +457,11 @@ > remote-endpoint = <&adv7511_in>; > }; > }; > + }; > +}; > + > +&lvds0 { > + ports { > port@1 { > lvds_connector: endpoint { > }; > diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi > index f9c5a557107d..4f526030dc7c 100644 > --- a/arch/arm/boot/dts/r8a7793.dtsi > +++ b/arch/arm/boot/dts/r8a7793.dtsi > @@ -1292,15 +1292,12 @@ > > du: display@feb00000 { > compatible = "renesas,du-r8a7793"; > - reg = <0 0xfeb00000 0 0x40000>, > - <0 0xfeb90000 0 0x1c>; > - reg-names = "du", "lvds.0"; > + reg = <0 0xfeb00000 0 0x40000>; > interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, > <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cpg CPG_MOD 724>, > - <&cpg CPG_MOD 723>, > - <&cpg CPG_MOD 726>; > - clock-names = "du.0", "du.1", "lvds.0"; > + <&cpg CPG_MOD 723>; > + clock-names = "du.0", "du.1"; > status = "disabled"; > > ports { > @@ -1315,6 +1312,34 @@ > port@1 { > reg = <1>; > du_out_lvds0: endpoint { > + remote-endpoint = <&lvds0_in>; > + }; > + }; > + }; > + }; > + > + lvds0: lvds@feb90000 { > + compatible = "renesas,r8a7793-lvds"; > + reg = <0 0xfeb90000 0 0x1c>; > + clocks = <&cpg CPG_MOD 726>; > + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; > + resets = <&cpg 726>; > + > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + lvds0_in: endpoint { > + remote-endpoint = <&du_out_lvds0>; > + }; > + }; > + port@1 { > + reg = <1>; > + lvds0_out: endpoint { > }; > }; > }; > -- > Regards, > > Laurent Pinchart >
diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts index 9ed6961f2d9a..96e117d8b2cc 100644 --- a/arch/arm/boot/dts/r8a7793-gose.dts +++ b/arch/arm/boot/dts/r8a7793-gose.dts @@ -447,10 +447,9 @@ pinctrl-names = "default"; status = "okay"; - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 726>, + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&x13_clk>, <&x2_clk>; - clock-names = "du.0", "du.1", "lvds.0", - "dclkin.0", "dclkin.1"; + clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1"; ports { port@0 { @@ -458,6 +457,11 @@ remote-endpoint = <&adv7511_in>; }; }; + }; +}; + +&lvds0 { + ports { port@1 { lvds_connector: endpoint { }; diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index f9c5a557107d..4f526030dc7c 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -1292,15 +1292,12 @@ du: display@feb00000 { compatible = "renesas,du-r8a7793"; - reg = <0 0xfeb00000 0 0x40000>, - <0 0xfeb90000 0 0x1c>; - reg-names = "du", "lvds.0"; + reg = <0 0xfeb00000 0 0x40000>; interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 724>, - <&cpg CPG_MOD 723>, - <&cpg CPG_MOD 726>; - clock-names = "du.0", "du.1", "lvds.0"; + <&cpg CPG_MOD 723>; + clock-names = "du.0", "du.1"; status = "disabled"; ports { @@ -1315,6 +1312,34 @@ port@1 { reg = <1>; du_out_lvds0: endpoint { + remote-endpoint = <&lvds0_in>; + }; + }; + }; + }; + + lvds0: lvds@feb90000 { + compatible = "renesas,r8a7793-lvds"; + reg = <0 0xfeb90000 0 0x1c>; + clocks = <&cpg CPG_MOD 726>; + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; + resets = <&cpg 726>; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + lvds0_in: endpoint { + remote-endpoint = <&du_out_lvds0>; + }; + }; + port@1 { + reg = <1>; + lvds0_out: endpoint { }; }; };
The internal LVDS encoder now has DT bindings separate from the DU. Port the device tree over to the new model. Fixes: c6a27fa41fab ("drm: rcar-du: Convert LVDS encoder code to bridge driver") Fixes: bff8f8c2feb7 ("ARM: dts: r8a7793: add soc node") Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> --- Changes since v3: - Added power-domains and resets properties to LVDS nodes Changes since v2: - Fixed LVDS compatible string Changes since v1: - Remove the DU reg-names property --- arch/arm/boot/dts/r8a7793-gose.dts | 10 +++++++--- arch/arm/boot/dts/r8a7793.dtsi | 37 +++++++++++++++++++++++++++++++------ 2 files changed, 38 insertions(+), 9 deletions(-)