| Message ID | 20180608122115.21138-1-laurent.pinchart+renesas@ideasonboard.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | e21adc781bb45e810f1c396c4bc2c1624a4c25b9 |
| Delegated to: | Simon Horman |
| Headers | show |
Hello! On 06/08/2018 03:21 PM, Laurent Pinchart wrote: > The VSPD and FCPVD nodes have overlapping register ranges, as the FCPVD > devices are mapped in the memory range usually used by the VSP LUT and > CLU, which are not present in the VSPD. Fix this by shortening the VSPD > registers range to 0x5000. > > Fixes: 9f8573e38a0b ("arm64: dts: renesas: r8a7795: Add VSP instances") > Fixes: 291e0c4994d0 ("arm64: dts: r8a7795: Add support for R-Car H3 ES2.0") > Fixes: f06ffdfbdd90 ("arm64: dts: r8a7796: Add VSP instances") > Fixes: b4f92030d5d3 ("arm64: dts: renesas: r8a77970: add VSPD support") > Fixes: 295952a183d3 ("arm64: dts: renesas: r8a77995: add VSP instances") > Fixes: 85cb3229218a ("arm64: dts: renesas: r8a77965: Add VSP instances") That'd be a nightmare for the -stable maintainers -- all those commits were made in the different time, so constant rejects are warranted. > Reported-by: Simon Horman <horms+renesas@verge.net.au> > Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> > Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> > --- > Changes since v1: > > - Fix H3, M3-W and M3-N in addition to V3H and D3 > - Don't touch the VSPBS instance of D3 as there's no overlap > - Squash all patches together Don't think that was a good idea in this case. Other opinions? [...] MBR, Sergei
Hi Sergei, (CC'ing Olof) On Friday, 8 June 2018 19:41:01 EEST Sergei Shtylyov wrote: > On 06/08/2018 03:21 PM, Laurent Pinchart wrote: > > The VSPD and FCPVD nodes have overlapping register ranges, as the FCPVD > > devices are mapped in the memory range usually used by the VSP LUT and > > CLU, which are not present in the VSPD. Fix this by shortening the VSPD > > registers range to 0x5000. > > > > Fixes: 9f8573e38a0b ("arm64: dts: renesas: r8a7795: Add VSP instances") > > Fixes: 291e0c4994d0 ("arm64: dts: r8a7795: Add support for R-Car H3 > > ES2.0") > > Fixes: f06ffdfbdd90 ("arm64: dts: r8a7796: Add VSP instances") > > Fixes: b4f92030d5d3 ("arm64: dts: renesas: r8a77970: add VSPD support") > > Fixes: 295952a183d3 ("arm64: dts: renesas: r8a77995: add VSP instances") > > Fixes: 85cb3229218a ("arm64: dts: renesas: r8a77965: Add VSP instances") > > That'd be a nightmare for the -stable maintainers -- all those commits > were made in the different time, so constant rejects are warranted. > > > Reported-by: Simon Horman <horms+renesas@verge.net.au> > > Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> > > Signed-off-by: Laurent Pinchart > > <laurent.pinchart+renesas@ideasonboard.com> > > --- > > Changes since v1: > > > > - Fix H3, M3-W and M3-N in addition to V3H and D3 > > - Don't touch the VSPBS instance of D3 as there's no overlap > > - Squash all patches together > > Don't think that was a good idea in this case. Other opinions? We have been requested ([1]) to try and group the DT changes, hence this change. No clear rule has been set, and this might be a case where a split is better. Olof, what would you prefer ? [1] https://www.spinics.net/lists/arm-kernel/msg657208.html
Hi Laurent, On Fri, Jun 8, 2018 at 2:22 PM Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> wrote: > The VSPD and FCPVD nodes have overlapping register ranges, as the FCPVD > devices are mapped in the memory range usually used by the VSP LUT and > CLU, which are not present in the VSPD. Fix this by shortening the VSPD > registers range to 0x5000. Note that VSPBD (R-Car H3) and VSPBS (R-Car D3) also have no LUT or CLU, so their register ranges could be shortened, too. But the're no (documented) overlap with an FCP (or anything else). > Fixes: 9f8573e38a0b ("arm64: dts: renesas: r8a7795: Add VSP instances") > Fixes: 291e0c4994d0 ("arm64: dts: r8a7795: Add support for R-Car H3 ES2.0") > Fixes: f06ffdfbdd90 ("arm64: dts: r8a7796: Add VSP instances") > Fixes: b4f92030d5d3 ("arm64: dts: renesas: r8a77970: add VSPD support") > Fixes: 295952a183d3 ("arm64: dts: renesas: r8a77995: add VSP instances") > Fixes: 85cb3229218a ("arm64: dts: renesas: r8a77965: Add VSP instances") > Reported-by: Simon Horman <horms+renesas@verge.net.au> > Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> > Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Thanks! Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On Fri, Jun 08, 2018 at 07:49:43PM +0300, Laurent Pinchart wrote: > Hi Sergei, > > (CC'ing Olof) > > On Friday, 8 June 2018 19:41:01 EEST Sergei Shtylyov wrote: > > On 06/08/2018 03:21 PM, Laurent Pinchart wrote: > > > The VSPD and FCPVD nodes have overlapping register ranges, as the FCPVD > > > devices are mapped in the memory range usually used by the VSP LUT and > > > CLU, which are not present in the VSPD. Fix this by shortening the VSPD > > > registers range to 0x5000. > > > > > > Fixes: 9f8573e38a0b ("arm64: dts: renesas: r8a7795: Add VSP instances") > > > Fixes: 291e0c4994d0 ("arm64: dts: r8a7795: Add support for R-Car H3 > > > ES2.0") > > > Fixes: f06ffdfbdd90 ("arm64: dts: r8a7796: Add VSP instances") > > > Fixes: b4f92030d5d3 ("arm64: dts: renesas: r8a77970: add VSPD support") > > > Fixes: 295952a183d3 ("arm64: dts: renesas: r8a77995: add VSP instances") > > > Fixes: 85cb3229218a ("arm64: dts: renesas: r8a77965: Add VSP instances") > > > > That'd be a nightmare for the -stable maintainers -- all those commits > > were made in the different time, so constant rejects are warranted. > > > > > Reported-by: Simon Horman <horms+renesas@verge.net.au> > > > Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> > > > Signed-off-by: Laurent Pinchart > > > <laurent.pinchart+renesas@ideasonboard.com> > > > --- > > > Changes since v1: > > > > > > - Fix H3, M3-W and M3-N in addition to V3H and D3 > > > - Don't touch the VSPBS instance of D3 as there's no overlap > > > - Squash all patches together > > > > Don't think that was a good idea in this case. Other opinions? > > We have been requested ([1]) to try and group the DT changes, hence this > change. No clear rule has been set, and this might be a case where a split is > better. Olof, what would you prefer ? > > [1] https://www.spinics.net/lists/arm-kernel/msg657208.html We are trying to find a new balance in response to [1]. If this turns out to be a problem for -stable then we will adjust our processes accordingly. Applied for v4.19 as this should not have any runtime effect. Thanks everyone.
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi index e19dcd6cb767..0a42b016f257 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi @@ -80,7 +80,7 @@ vspd3: vsp@fea38000 { compatible = "renesas,vsp2"; - reg = <0 0xfea38000 0 0x8000>; + reg = <0 0xfea38000 0 0x5000>; interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 620>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 9b154ff33e67..6803c0075d51 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -2539,7 +2539,7 @@ vspd0: vsp@fea20000 { compatible = "renesas,vsp2"; - reg = <0 0xfea20000 0 0x8000>; + reg = <0 0xfea20000 0 0x5000>; interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 623>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; @@ -2550,7 +2550,7 @@ vspd1: vsp@fea28000 { compatible = "renesas,vsp2"; - reg = <0 0xfea28000 0 0x8000>; + reg = <0 0xfea28000 0 0x5000>; interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 622>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; @@ -2561,7 +2561,7 @@ vspd2: vsp@fea30000 { compatible = "renesas,vsp2"; - reg = <0 0xfea30000 0 0x8000>; + reg = <0 0xfea30000 0 0x5000>; interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 621>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index 3ca3f56110fe..636090ce3ee8 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -2256,7 +2256,7 @@ vspd0: vsp@fea20000 { compatible = "renesas,vsp2"; - reg = <0 0xfea20000 0 0x8000>; + reg = <0 0xfea20000 0 0x5000>; interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 623>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; @@ -2267,7 +2267,7 @@ vspd1: vsp@fea28000 { compatible = "renesas,vsp2"; - reg = <0 0xfea28000 0 0x8000>; + reg = <0 0xfea28000 0 0x5000>; interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 622>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; @@ -2278,7 +2278,7 @@ vspd2: vsp@fea30000 { compatible = "renesas,vsp2"; - reg = <0 0xfea30000 0 0x8000>; + reg = <0 0xfea30000 0 0x5000>; interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 621>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi index d740c79752d5..a584dfc78339 100644 --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi @@ -1490,7 +1490,7 @@ vspd0: vsp@fea20000 { compatible = "renesas,vsp2"; - reg = <0 0xfea20000 0 0x8000>; + reg = <0 0xfea20000 0 0x5000>; interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 623>; power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; @@ -1509,7 +1509,7 @@ vspd1: vsp@fea28000 { compatible = "renesas,vsp2"; - reg = <0 0xfea28000 0 0x8000>; + reg = <0 0xfea28000 0 0x5000>; interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 622>; power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi index 98a2317a16c4..89dc4e343b7c 100644 --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi @@ -776,7 +776,7 @@ vspd0: vsp@fea20000 { compatible = "renesas,vsp2"; - reg = <0 0xfea20000 0 0x8000>; + reg = <0 0xfea20000 0 0x5000>; interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 623>; power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index eb23c85c561b..a63bebbfd238 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -714,7 +714,7 @@ vspd0: vsp@fea20000 { compatible = "renesas,vsp2"; - reg = <0 0xfea20000 0 0x8000>; + reg = <0 0xfea20000 0 0x5000>; interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 623>; power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; @@ -724,7 +724,7 @@ vspd1: vsp@fea28000 { compatible = "renesas,vsp2"; - reg = <0 0xfea28000 0 0x8000>; + reg = <0 0xfea28000 0 0x5000>; interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 622>; power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
The VSPD and FCPVD nodes have overlapping register ranges, as the FCPVD devices are mapped in the memory range usually used by the VSP LUT and CLU, which are not present in the VSPD. Fix this by shortening the VSPD registers range to 0x5000. Fixes: 9f8573e38a0b ("arm64: dts: renesas: r8a7795: Add VSP instances") Fixes: 291e0c4994d0 ("arm64: dts: r8a7795: Add support for R-Car H3 ES2.0") Fixes: f06ffdfbdd90 ("arm64: dts: r8a7796: Add VSP instances") Fixes: b4f92030d5d3 ("arm64: dts: renesas: r8a77970: add VSPD support") Fixes: 295952a183d3 ("arm64: dts: renesas: r8a77995: add VSP instances") Fixes: 85cb3229218a ("arm64: dts: renesas: r8a77965: Add VSP instances") Reported-by: Simon Horman <horms+renesas@verge.net.au> Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> --- Changes since v1: - Fix H3, M3-W and M3-N in addition to V3H and D3 - Don't touch the VSPBS instance of D3 as there's no overlap - Squash all patches together --- arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 2 +- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 6 +++--- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 6 +++--- arch/arm64/boot/dts/renesas/r8a77965.dtsi | 4 ++-- arch/arm64/boot/dts/renesas/r8a77970.dtsi | 2 +- arch/arm64/boot/dts/renesas/r8a77995.dtsi | 4 ++-- 6 files changed, 12 insertions(+), 12 deletions(-)