From patchwork Thu Jun 28 12:18:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 10493715 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3228B6022E for ; Thu, 28 Jun 2018 12:18:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1D0CE29C42 for ; Thu, 28 Jun 2018 12:18:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 10DC229C52; Thu, 28 Jun 2018 12:18:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BC2D129C42 for ; Thu, 28 Jun 2018 12:18:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752499AbeF1MST (ORCPT ); Thu, 28 Jun 2018 08:18:19 -0400 Received: from kirsty.vergenet.net ([202.4.237.240]:53739 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751177AbeF1MSS (ORCPT ); Thu, 28 Jun 2018 08:18:18 -0400 Received: from reginn.horms.nl (watermunt.horms.nl [80.127.179.77]) by kirsty.vergenet.net (Postfix) with ESMTPA id 434C025B7A3; Thu, 28 Jun 2018 22:18:16 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1530188296; bh=eMiYzt/6JFKk5zMvKzVGGeEP3eSf04zaCHrvDO0Oox4=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=Q41G5//VLCE2z2V6ZdrqODapuUlCeblET/BOhf3zw3Bft/F+cQ0wsinDbvGn3+l63 lh7TFt0NXyD0K/m/BqeOf1wfMRLGte+pRQWds3MmRpc/HKAY/zNyJs+ghaNMEtbv6b rZh5ig1SwyJV6VslKdW85UoZ/9FSF7dYreO2RPOw= Received: by reginn.horms.nl (Postfix, from userid 7100) id 3219A940760; Thu, 28 Jun 2018 14:18:14 +0200 (CEST) Date: Thu, 28 Jun 2018 14:18:14 +0200 From: Simon Horman To: Michel Pollet Cc: linux-renesas-soc@vger.kernel.org, phil.edworthy@renesas.com, Michel Pollet , Rob Herring , Mark Rutland , Magnus Damm , Douglas Anderson , Geert Uytterhoeven , Rajendra Nayak , Chen-Yu Tsai , Stefan Wahren , Carlo Caione , Florian Fainelli , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v7 3/3] ARM: dts: Renesas R9A06G032 SMP enable method Message-ID: <20180628121813.ffrppdo7p3s42t5i@verge.net.au> References: <1530173842-56851-1-git-send-email-michel.pollet@bp.renesas.com> <1530173842-56851-4-git-send-email-michel.pollet@bp.renesas.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1530173842-56851-4-git-send-email-michel.pollet@bp.renesas.com> Organisation: Horms Solutions BV User-Agent: NeoMutt/20170113 (1.7.2) Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Thu, Jun 28, 2018 at 09:17:14AM +0100, Michel Pollet wrote: > Add a special enable method for the second CA7 of the R9A06G032 > as well as the default value for the "cpu-release-addr" property. > > Signed-off-by: Michel Pollet > Reviewed-by: Geert Uytterhoeven Thanks, applied. I had to manually resolve a conflict due to updates to the patch that added this dtsi file (as noted elsewhere). Please check that this is correct. From: Michel Pollet Subject: [PATCH] ARM: dts: Renesas R9A06G032 SMP enable method Add a special enable method for the second CA7 of the R9A06G032 as well as the default value for the "cpu-release-addr" property. Signed-off-by: Michel Pollet Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r9a06g032.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 339d0958011e..afe29c95a006 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -29,6 +29,8 @@ compatible = "arm,cortex-a7"; reg = <1>; clocks = <&sysctrl 84>; + enable-method = "renesas,r9a06g032-smp"; + cpu-release-addr = <0 0x4000c204>; }; };