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[86.49.110.70]) by smtp.gmail.com with ESMTPSA id n15sm3509746wrt.21.2018.11.18.09.29.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 18 Nov 2018 09:29:20 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: Takeshi Kihara , Marek Vasut , Geert Uytterhoeven , Simon Horman , Wolfram Sang , Yoshihiro Shimoda , linux-renesas-soc@vger.kernel.org Subject: [PATCH 3/4] pinctrl: sh-pfc: r8a77990: Add CAN pins, groups and functions Date: Sun, 18 Nov 2018 18:29:02 +0100 Message-Id: <20181118172903.4481-3-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181118172903.4481-1-marek.vasut+renesas@gmail.com> References: <20181118172903.4481-1-marek.vasut+renesas@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Takeshi Kihara This patch adds CAN{0,1} pins, groups and functions to the R8A77990 SoC. Signed-off-by: Takeshi Kihara Signed-off-by: Marek Vasut Cc: Geert Uytterhoeven Cc: Simon Horman Cc: Wolfram Sang Cc: Yoshihiro Shimoda Cc: linux-renesas-soc@vger.kernel.org Reviewed-by: Geert Uytterhoeven --- drivers/pinctrl/sh-pfc/pfc-r8a77990.c | 51 +++++++++++++++++++++++++-- 1 file changed, 49 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c index 95d478353627..db000acc880c 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c @@ -1375,6 +1375,35 @@ static const unsigned int avb_avtp_capture_a_mux[] = { AVB_AVTP_CAPTURE_A_MARK, }; +/* - CAN ------------------------------------------------------------------ */ +static const unsigned int can0_data_pins[] = { + /* TX, RX */ + RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13), +}; + +static const unsigned int can0_data_mux[] = { + CAN0_TX_MARK, CAN0_RX_MARK, +}; + +static const unsigned int can1_data_pins[] = { + /* TX, RX */ + RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 7), +}; + +static const unsigned int can1_data_mux[] = { + CAN1_TX_MARK, CAN1_RX_MARK, +}; + +/* - CAN Clock -------------------------------------------------------------- */ +static const unsigned int can_clk_pins[] = { + /* CLK */ + RCAR_GP_PIN(0, 14), +}; + +static const unsigned int can_clk_mux[] = { + CAN_CLK_MARK, +}; + /* - DU --------------------------------------------------------------------- */ static const unsigned int du_rgb666_pins[] = { /* R[7:2], G[7:2], B[7:2] */ @@ -2606,7 +2635,7 @@ static const unsigned int usb30_id_mux[] = { }; static const struct { - struct sh_pfc_pin_group common[140]; + struct sh_pfc_pin_group common[143]; struct sh_pfc_pin_group automotive[0]; } pinmux_groups = { .common = { @@ -2617,6 +2646,9 @@ static const struct { SH_PFC_PIN_GROUP(avb_avtp_pps), SH_PFC_PIN_GROUP(avb_avtp_match_a), SH_PFC_PIN_GROUP(avb_avtp_capture_a), + SH_PFC_PIN_GROUP(can0_data), + SH_PFC_PIN_GROUP(can1_data), + SH_PFC_PIN_GROUP(can_clk), SH_PFC_PIN_GROUP(du_rgb666), SH_PFC_PIN_GROUP(du_rgb888), SH_PFC_PIN_GROUP(du_clk_in_0), @@ -2763,6 +2795,18 @@ static const char * const avb_groups[] = { "avb_avtp_capture_a", }; +static const char * const can0_groups[] = { + "can0_data", +}; + +static const char * const can1_groups[] = { + "can1_data", +}; + +static const char * const can_clk_groups[] = { + "can_clk", +}; + static const char * const du_groups[] = { "du_rgb666", "du_rgb888", @@ -2990,11 +3034,14 @@ static const char * const usb30_groups[] = { }; static const struct { - struct sh_pfc_function common[32]; + struct sh_pfc_function common[35]; struct sh_pfc_function automotive[0]; } pinmux_functions = { .common = { SH_PFC_FUNCTION(avb), + SH_PFC_FUNCTION(can0), + SH_PFC_FUNCTION(can1), + SH_PFC_FUNCTION(can_clk), SH_PFC_FUNCTION(du), SH_PFC_FUNCTION(i2c1), SH_PFC_FUNCTION(i2c2),