diff mbox series

[v3,01/15] ARM: dts: r7s9210: Add USB clock

Message ID 20190514145605.19112-2-chris.brandt@renesas.com (mailing list archive)
State Superseded
Commit 283f881a4d3762354d20217bc0306ee850b3c685
Delegated to: Simon Horman
Headers show
Series usb: Add host and device support for RZ/A2 | expand

Commit Message

Chris Brandt May 14, 2019, 2:55 p.m. UTC
Add USB clock node. If present, this clock input must be 48MHz.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
---
v2:
 * added reviewed-by
---
 arch/arm/boot/dts/r7s9210.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

Geert Uytterhoeven May 15, 2019, 7:38 a.m. UTC | #1
On Tue, May 14, 2019 at 4:56 PM Chris Brandt <chris.brandt@renesas.com> wrote:
> Add USB clock node. If present, this clock input must be 48MHz.
>
> Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert
Simon Horman May 15, 2019, 7:52 a.m. UTC | #2
On Wed, May 15, 2019 at 09:38:32AM +0200, Geert Uytterhoeven wrote:
> On Tue, May 14, 2019 at 4:56 PM Chris Brandt <chris.brandt@renesas.com> wrote:
> > Add USB clock node. If present, this clock input must be 48MHz.
> >
> > Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
> > Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
> 
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Thanks, applied for v5.3.
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/r7s9210.dtsi b/arch/arm/boot/dts/r7s9210.dtsi
index 2eaa5eeba509..73041f04fef5 100644
--- a/arch/arm/boot/dts/r7s9210.dtsi
+++ b/arch/arm/boot/dts/r7s9210.dtsi
@@ -30,6 +30,13 @@ 
 		clock-frequency = <0>;
 	};
 
+	usb_x1_clk: usb_x1 {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		/* If clk present, value (48000000) must be set by board */
+		clock-frequency = <0>;
+	};
+
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;