From patchwork Wed Oct 16 20:06:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Rob Herring (Arm)" X-Patchwork-Id: 11194251 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CA68314DB for ; Wed, 16 Oct 2019 20:07:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AAFF820663 for ; Wed, 16 Oct 2019 20:07:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1571256450; bh=yiyjbhDrIGSaXyqWNKsqbWK9aTO4cOjehsMOBOgY+3Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=EIxE8CO5+snszhh0eFbWGuxPY0Nlzo2f5xDNS6XKs1d83Y/NxDHH3UPuhCh62BuuO rL6IY9IRx38c15bzz+OMy1CNDfSiB1Q2W7Nb7kou9caxdfCPNqdB/WgsqPaXOfr6Uq Eg86lX6XKirORwU1LGlP7tx8Hnfv2z/OLZR7xgOI= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733045AbfJPUHa (ORCPT ); Wed, 16 Oct 2019 16:07:30 -0400 Received: from mail-oi1-f194.google.com ([209.85.167.194]:35626 "EHLO mail-oi1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727366AbfJPUHa (ORCPT ); Wed, 16 Oct 2019 16:07:30 -0400 Received: by mail-oi1-f194.google.com with SMTP id x3so141671oig.2; Wed, 16 Oct 2019 13:07:29 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9dn1tmxzjQTI9PAUk6uuXXt7CY5FAAIGihQa/Sw5ORA=; b=CJSjpJjFvuUkticBkJecnwIi+1100MyeciKOzlxju3VbBKNghb3W5ukHc5X/uZceMI OzFoBdYEy8Trr4gUE972RiaNrPdqIjuUFAP7sPGEHwfVJU6Z0663T6iyJ1blA+c3xBOz Vam5pOymImv7AlveGi63a6kkMM73M4Aq/TSzswqQ1HQR+Id9auErjwGwGPg1UF636Ufz kZpylI+A9t83h719znOsuuKjbwxqNh80d+Op+opWiEI+zTmxI5BSAd4FtEMfLmpgPHVU emgZsSPYiXalc6qPsnftL+589XhEk+sGP96DA3SRScsm85EC9L3p9GkBk2fplmXIY6hl PnZw== X-Gm-Message-State: APjAAAXP+uL/HkZ0lbqDvq66UUs88j3oiJJHu7fYxLpad3qVlAlii5O3 ckrWmKRn2GdFaTRM/Ai+8Q== X-Google-Smtp-Source: APXvYqy4BvFE0JVjSY2m/IplvmhNeMcI4gWkgM+9uLk0Ec5UKDxEz7AyuW1jP9gWK7a0Hcsgd1QA3Q== X-Received: by 2002:a54:410f:: with SMTP id l15mr109468oic.140.1571256449199; Wed, 16 Oct 2019 13:07:29 -0700 (PDT) Received: from xps15.herring.priv (24-155-109-49.dyn.grandenetworks.net. [24.155.109.49]) by smtp.googlemail.com with ESMTPSA id a9sm7412463oie.7.2019.10.16.13.07.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Oct 2019 13:07:28 -0700 (PDT) From: Rob Herring To: Andrew Murray , Bjorn Helgaas , Lorenzo Pieralisi Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, bcm-kernel-feedback-list@broadcom.com, Gustavo Pimentel , Heiko Stuebner , Hou Zhiqiang , Jingoo Han , Karthikeyan Mitran , Ley Foon Tan , Linus Walleij , linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org, Matthias Brugger , Michal Simek , Ray Jui , rfi@lists.rocketboards.org, Ryder Lee , Scott Branden , Shawn Lin , Simon Horman , Srinath Mannam , Thomas Petazzoni , Toan Le , Tom Joseph , Will Deacon Subject: [PATCH v2 21/25] PCI: v3-semi: Use inbound resources for setup Date: Wed, 16 Oct 2019 15:06:43 -0500 Message-Id: <20191016200647.32050-22-robh@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191016200647.32050-1-robh@kernel.org> References: <20191016200647.32050-1-robh@kernel.org> MIME-Version: 1.0 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Now that the helpers provide the inbound resources in the host bridge 'dma_ranges' resource list, convert the v3-semi host bridge to use the resource list to setup the inbound addresses. Cc: Lorenzo Pieralisi Cc: Bjorn Helgaas Reviewed-by: Andrew Murray Reviewed-by: Linus Walleij Signed-off-by: Rob Herring --- drivers/pci/controller/pci-v3-semi.c | 38 ++++++++++++---------------- 1 file changed, 16 insertions(+), 22 deletions(-) diff --git a/drivers/pci/controller/pci-v3-semi.c b/drivers/pci/controller/pci-v3-semi.c index 2209c7671115..bd05221f5a22 100644 --- a/drivers/pci/controller/pci-v3-semi.c +++ b/drivers/pci/controller/pci-v3-semi.c @@ -598,28 +598,30 @@ static int v3_pci_setup_resource(struct v3_pci *v3, } static int v3_get_dma_range_config(struct v3_pci *v3, - struct of_pci_range *range, + struct resource_entry *entry, u32 *pci_base, u32 *pci_map) { struct device *dev = v3->dev; - u64 cpu_end = range->cpu_addr + range->size - 1; - u64 pci_end = range->pci_addr + range->size - 1; + u64 cpu_addr = entry->res->start; + u64 cpu_end = entry->res->end; + u64 pci_end = cpu_end - entry->offset; + u64 pci_addr = entry->res->start - entry->offset; u32 val; - if (range->pci_addr & ~V3_PCI_BASE_M_ADR_BASE) { + if (pci_addr & ~V3_PCI_BASE_M_ADR_BASE) { dev_err(dev, "illegal range, only PCI bits 31..20 allowed\n"); return -EINVAL; } - val = ((u32)range->pci_addr) & V3_PCI_BASE_M_ADR_BASE; + val = ((u32)pci_addr) & V3_PCI_BASE_M_ADR_BASE; *pci_base = val; - if (range->cpu_addr & ~V3_PCI_MAP_M_MAP_ADR) { + if (cpu_addr & ~V3_PCI_MAP_M_MAP_ADR) { dev_err(dev, "illegal range, only CPU bits 31..20 allowed\n"); return -EINVAL; } - val = ((u32)range->cpu_addr) & V3_PCI_MAP_M_MAP_ADR; + val = ((u32)cpu_addr) & V3_PCI_MAP_M_MAP_ADR; - switch (range->size) { + switch (resource_size(entry->res)) { case SZ_1M: val |= V3_LB_BASE_ADR_SIZE_1MB; break; @@ -667,8 +669,8 @@ static int v3_get_dma_range_config(struct v3_pci *v3, dev_dbg(dev, "DMA MEM CPU: 0x%016llx -> 0x%016llx => " "PCI: 0x%016llx -> 0x%016llx base %08x map %08x\n", - range->cpu_addr, cpu_end, - range->pci_addr, pci_end, + cpu_addr, cpu_end, + pci_addr, pci_end, *pci_base, *pci_map); return 0; @@ -677,24 +679,16 @@ static int v3_get_dma_range_config(struct v3_pci *v3, static int v3_pci_parse_map_dma_ranges(struct v3_pci *v3, struct device_node *np) { - struct of_pci_range range; - struct of_pci_range_parser parser; + struct pci_host_bridge *bridge = pci_host_bridge_from_priv(v3); struct device *dev = v3->dev; + struct resource_entry *entry; int i = 0; - if (of_pci_dma_range_parser_init(&parser, np)) { - dev_err(dev, "missing dma-ranges property\n"); - return -EINVAL; - } - - /* - * Get the dma-ranges from the device tree - */ - for_each_of_pci_range(&parser, &range) { + resource_list_for_each_entry(entry, &bridge->dma_ranges) { int ret; u32 pci_base, pci_map; - ret = v3_get_dma_range_config(v3, &range, &pci_base, &pci_map); + ret = v3_get_dma_range_config(v3, entry, &pci_base, &pci_map); if (ret) return ret;