From patchwork Mon Mar 9 17:11:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 11427605 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 235C392A for ; Mon, 9 Mar 2020 17:11:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0485D208C3 for ; Mon, 9 Mar 2020 17:11:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727225AbgCIRLQ (ORCPT ); Mon, 9 Mar 2020 13:11:16 -0400 Received: from xavier.telenet-ops.be ([195.130.132.52]:43466 "EHLO xavier.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727220AbgCIRLQ (ORCPT ); Mon, 9 Mar 2020 13:11:16 -0400 Received: from ramsan ([84.195.182.253]) by xavier.telenet-ops.be with bizsmtp id CHBD2200E5USYZQ01HBDqH; Mon, 09 Mar 2020 18:11:14 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan with esmtp (Exim 4.90_1) (envelope-from ) id 1jBLvt-0007Kw-Hk; Mon, 09 Mar 2020 18:11:13 +0100 Received: from geert by rox.of.borg with local (Exim 4.90_1) (envelope-from ) id 1jBLvt-0005Ut-G0; Mon, 09 Mar 2020 18:11:13 +0100 From: Geert Uytterhoeven To: Magnus Damm Cc: Ulrich Hecht , linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Takeshi Kihara , Geert Uytterhoeven Subject: [PATCH] arm64: dts: renesas: r8a77965: Add CPUIdle support for CA57 cores Date: Mon, 9 Mar 2020 18:11:12 +0100 Message-Id: <20200309171112.21086-1-geert+renesas@glider.be> X-Mailer: git-send-email 2.17.1 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Takeshi Kihara Enable cpuidle (core shutdown) support for the CA57 cores on R-Car M3-N. Signed-off-by: Takeshi Kihara Signed-off-by: Geert Uytterhoeven --- To be queued in renesas-devel for v5.7. arch/arm64/boot/dts/renesas/r8a77965.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi index f7468822e81e41d6..d82dd4e67b62b85c 100644 --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi @@ -111,6 +111,7 @@ power-domains = <&sysc R8A77965_PD_CA57_CPU0>; next-level-cache = <&L2_CA57>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; #cooling-cells = <2>; dynamic-power-coefficient = <854>; clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; @@ -124,6 +125,7 @@ power-domains = <&sysc R8A77965_PD_CA57_CPU1>; next-level-cache = <&L2_CA57>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; operating-points-v2 = <&cluster0_opp>; }; @@ -134,6 +136,19 @@ cache-unified; cache-level = <2>; }; + + idle-states { + entry-method = "psci"; + + CPU_SLEEP_0: cpu-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0010000>; + local-timer-stop; + entry-latency-us = <400>; + exit-latency-us = <500>; + min-residency-us = <4000>; + }; + }; }; extal_clk: extal {