From patchwork Fri Aug 14 17:30:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lad Prabhakar X-Patchwork-Id: 11715091 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 94257618 for ; Fri, 14 Aug 2020 17:33:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8518D20829 for ; Fri, 14 Aug 2020 17:33:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728525AbgHNRdd (ORCPT ); Fri, 14 Aug 2020 13:33:33 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:57426 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726270AbgHNRdb (ORCPT ); Fri, 14 Aug 2020 13:33:31 -0400 X-IronPort-AV: E=Sophos;i="5.76,313,1592838000"; d="scan'208";a="54596892" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 15 Aug 2020 02:33:29 +0900 Received: from localhost.localdomain (unknown [10.226.36.204]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 7F11640062AC; Sat, 15 Aug 2020 02:33:26 +0900 (JST) From: Lad Prabhakar To: Geert Uytterhoeven , Marek Vasut , Yoshihiro Shimoda , Bjorn Helgaas , Rob Herring , Magnus Damm , Kishon Vijay Abraham I , Lorenzo Pieralisi , Arnd Bergmann , Greg Kroah-Hartman Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Lad Prabhakar , Prabhakar , Biju Das Subject: [PATCH 3/5] arm64: dts: renesas: r8a774a1: Add PCIe EP nodes Date: Fri, 14 Aug 2020 18:30:35 +0100 Message-Id: <20200814173037.17822-4-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200814173037.17822-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20200814173037.17822-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Add PCIe EP nodes to R8A774A1 (RZ/G2M) SoC dtsi. Signed-off-by: Lad Prabhakar Reviewed-by: Biju Das Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 38 +++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi index a603d947970e..50e9ed16a36d 100644 --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi @@ -2369,6 +2369,44 @@ status = "disabled"; }; + pciec0_ep: pcie_ep@fe000000 { + compatible = "renesas,r8a774a1-pcie-ep", + "renesas,rcar-gen3-pcie-ep"; + reg = <0x0 0xfe000000 0 0x80000>, + <0x0 0xfe100000 0 0x100000>, + <0x0 0xfe200000 0 0x200000>, + <0x0 0x30000000 0 0x8000000>, + <0x0 0x38000000 0 0x8000000>; + reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; + interrupts = , + , + ; + clocks = <&cpg CPG_MOD 319>; + clock-names = "pcie"; + resets = <&cpg 319>; + power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; + status = "disabled"; + }; + + pciec1_ep: pcie_ep@ee800000 { + compatible = "renesas,r8a774a1-pcie-ep", + "renesas,rcar-gen3-pcie-ep"; + reg = <0x0 0xee800000 0 0x80000>, + <0x0 0xee900000 0 0x100000>, + <0x0 0xeea00000 0 0x200000>, + <0x0 0xc0000000 0 0x8000000>, + <0x0 0xc8000000 0 0x8000000>; + reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; + interrupts = , + , + ; + clocks = <&cpg CPG_MOD 318>; + clock-names = "pcie"; + resets = <&cpg 318>; + power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; + status = "disabled"; + }; + fdp1@fe940000 { compatible = "renesas,fdp1"; reg = <0 0xfe940000 0 0x2400>;