diff mbox series

[2/4] pinctrl: sh-pfc: r8a7796: Add VIN pins, groups and functions

Message ID 20200914233744.468175-3-niklas.soderlund+renesas@ragnatech.se
State Superseded
Delegated to: Geert Uytterhoeven
Headers show
Series pinctrl: sh-pfc: Add VIN stf8 pins | expand

Commit Message

Niklas Söderlund Sept. 14, 2020, 11:37 p.m. UTC
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>

This patch adds VIN{4,5} pins, groups and functions to the R8A7796 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[Niklas: Rework to fit upstream driver]
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
---
 drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

Comments

Sergei Shtylyov Sept. 15, 2020, 8:24 a.m. UTC | #1
On 15.09.2020 2:37, Niklas Söderlund wrote:

> From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> 
> This patch adds VIN{4,5} pins, groups and functions to the R8A7796 SoC.

    Same question on the subject/changelog here...

> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> [Niklas: Rework to fit upstream driver]
> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> ---
>   drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 28 ++++++++++++++++++++++++++++
>   1 file changed, 28 insertions(+)
> 
> diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
> index a2496baca85d23f8..a50beb81a342f636 100644
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
> @@ -4048,6 +4048,18 @@ static const union vin_data vin4_data_b_mux = {
>   		VI4_DATA22_MARK, VI4_DATA23_MARK,
>   	},
>   };
> +static const unsigned int vin4_data8_sft8_pins[] = {
> +	RCAR_GP_PIN(1, 0),  RCAR_GP_PIN(1, 1),
> +	RCAR_GP_PIN(1, 2),  RCAR_GP_PIN(1, 3),
> +	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 5),
> +	RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 7),
> +};
> +static const unsigned int vin4_data8_sft8_mux[] = {
> +	VI4_DATA8_MARK,  VI4_DATA9_MARK,
> +	VI4_DATA10_MARK, VI4_DATA11_MARK,
> +	VI4_DATA12_MARK, VI4_DATA13_MARK,
> +	VI4_DATA14_MARK, VI4_DATA15_MARK,
> +};
>   static const unsigned int vin4_sync_pins[] = {
>   	/* HSYNC#, VSYNC# */
>   	RCAR_GP_PIN(1, 18), RCAR_GP_PIN(1, 17),
> @@ -4102,6 +4114,18 @@ static const union vin_data16 vin5_data_mux = {
>   		VI5_DATA14_MARK, VI5_DATA15_MARK,
>   	},
>   };
> +static const unsigned int vin5_data8_sft8_pins[] = {
> +	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
> +	RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15),
> +	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 5),
> +	RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 7),
> +};
> +static const unsigned int vin5_data8_sft8_mux[] = {
> +	VI5_DATA8_MARK,  VI5_DATA9_MARK,
> +	VI5_DATA10_MARK, VI5_DATA11_MARK,
> +	VI5_DATA12_MARK, VI5_DATA13_MARK,
> +	VI5_DATA14_MARK, VI5_DATA15_MARK,
> +};
>   static const unsigned int vin5_sync_pins[] = {
>   	/* HSYNC#, VSYNC# */
>   	RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
> @@ -4440,6 +4464,7 @@ static const struct {
>   		SH_PFC_PIN_GROUP(vin4_data18_b),
>   		VIN_DATA_PIN_GROUP(vin4_data, 20, _b),
>   		VIN_DATA_PIN_GROUP(vin4_data, 24, _b),
> +		SH_PFC_PIN_GROUP(vin4_data8_sft8),
>   		SH_PFC_PIN_GROUP(vin4_sync),
>   		SH_PFC_PIN_GROUP(vin4_field),
>   		SH_PFC_PIN_GROUP(vin4_clkenb),
> @@ -4448,6 +4473,7 @@ static const struct {
>   		VIN_DATA_PIN_GROUP(vin5_data, 10),
>   		VIN_DATA_PIN_GROUP(vin5_data, 12),
>   		VIN_DATA_PIN_GROUP(vin5_data, 16),
> +		SH_PFC_PIN_GROUP(vin5_data8_sft8),
>   		SH_PFC_PIN_GROUP(vin5_sync),
>   		SH_PFC_PIN_GROUP(vin5_field),
>   		SH_PFC_PIN_GROUP(vin5_clkenb),
> @@ -4978,6 +5004,7 @@ static const char * const vin4_groups[] = {
>   	"vin4_data18_b",
>   	"vin4_data20_b",
>   	"vin4_data24_b",
> +	"vin4_data8_sft8",
>   	"vin4_sync",
>   	"vin4_field",
>   	"vin4_clkenb",
> @@ -4989,6 +5016,7 @@ static const char * const vin5_groups[] = {
>   	"vin5_data10",
>   	"vin5_data12",
>   	"vin5_data16",
> +	"vin5_data8_sft8",
>   	"vin5_sync",
>   	"vin5_field",
>   	"vin5_clkenb",

MBR, Sergei
diff mbox series

Patch

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
index a2496baca85d23f8..a50beb81a342f636 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
@@ -4048,6 +4048,18 @@  static const union vin_data vin4_data_b_mux = {
 		VI4_DATA22_MARK, VI4_DATA23_MARK,
 	},
 };
+static const unsigned int vin4_data8_sft8_pins[] = {
+	RCAR_GP_PIN(1, 0),  RCAR_GP_PIN(1, 1),
+	RCAR_GP_PIN(1, 2),  RCAR_GP_PIN(1, 3),
+	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 5),
+	RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 7),
+};
+static const unsigned int vin4_data8_sft8_mux[] = {
+	VI4_DATA8_MARK,  VI4_DATA9_MARK,
+	VI4_DATA10_MARK, VI4_DATA11_MARK,
+	VI4_DATA12_MARK, VI4_DATA13_MARK,
+	VI4_DATA14_MARK, VI4_DATA15_MARK,
+};
 static const unsigned int vin4_sync_pins[] = {
 	/* HSYNC#, VSYNC# */
 	RCAR_GP_PIN(1, 18), RCAR_GP_PIN(1, 17),
@@ -4102,6 +4114,18 @@  static const union vin_data16 vin5_data_mux = {
 		VI5_DATA14_MARK, VI5_DATA15_MARK,
 	},
 };
+static const unsigned int vin5_data8_sft8_pins[] = {
+	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
+	RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15),
+	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 5),
+	RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 7),
+};
+static const unsigned int vin5_data8_sft8_mux[] = {
+	VI5_DATA8_MARK,  VI5_DATA9_MARK,
+	VI5_DATA10_MARK, VI5_DATA11_MARK,
+	VI5_DATA12_MARK, VI5_DATA13_MARK,
+	VI5_DATA14_MARK, VI5_DATA15_MARK,
+};
 static const unsigned int vin5_sync_pins[] = {
 	/* HSYNC#, VSYNC# */
 	RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
@@ -4440,6 +4464,7 @@  static const struct {
 		SH_PFC_PIN_GROUP(vin4_data18_b),
 		VIN_DATA_PIN_GROUP(vin4_data, 20, _b),
 		VIN_DATA_PIN_GROUP(vin4_data, 24, _b),
+		SH_PFC_PIN_GROUP(vin4_data8_sft8),
 		SH_PFC_PIN_GROUP(vin4_sync),
 		SH_PFC_PIN_GROUP(vin4_field),
 		SH_PFC_PIN_GROUP(vin4_clkenb),
@@ -4448,6 +4473,7 @@  static const struct {
 		VIN_DATA_PIN_GROUP(vin5_data, 10),
 		VIN_DATA_PIN_GROUP(vin5_data, 12),
 		VIN_DATA_PIN_GROUP(vin5_data, 16),
+		SH_PFC_PIN_GROUP(vin5_data8_sft8),
 		SH_PFC_PIN_GROUP(vin5_sync),
 		SH_PFC_PIN_GROUP(vin5_field),
 		SH_PFC_PIN_GROUP(vin5_clkenb),
@@ -4978,6 +5004,7 @@  static const char * const vin4_groups[] = {
 	"vin4_data18_b",
 	"vin4_data20_b",
 	"vin4_data24_b",
+	"vin4_data8_sft8",
 	"vin4_sync",
 	"vin4_field",
 	"vin4_clkenb",
@@ -4989,6 +5016,7 @@  static const char * const vin5_groups[] = {
 	"vin5_data10",
 	"vin5_data12",
 	"vin5_data16",
+	"vin5_data8_sft8",
 	"vin5_sync",
 	"vin5_field",
 	"vin5_clkenb",