diff mbox series

arm64: dts: renesas: r8a77961: Add MSIOF nodes

Message ID 20201005112951.22532-1-geert+renesas@glider.be
State Accepted
Delegated to: Geert Uytterhoeven
Headers show
Series arm64: dts: renesas: r8a77961: Add MSIOF nodes | expand

Commit Message

Geert Uytterhoeven Oct. 5, 2020, 11:29 a.m. UTC
Add the device nodes for all Clock-Synchronized Serial Interface with
FIFO (MSIOF) instances on R-Car M3-W+.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Tested on Salvator-XS with R-Car M3-W+, using MSIOF2A loopback
(MOSI = EXIO D pin 21 <-> MISO = EXIO D pin 23),
CONFIG_SPI_LOOPBACK_TEST, and the following appended to
arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts:

    &pfc {
	    msiof2_pins: msiof2 {
		    groups = "msiof2_clk_a", "msiof2_sync_a",
			     "msiof2_rxd_a", "msiof2_txd_a";
		    function = "msiof2";
	    };
    };

    &msiof2 {
	    pinctrl-0 = <&msiof2_pins>;
	    pinctrl-names = "default";

	    #address-cells = <1>;
	    #size-cells = <0>;
	    status = "okay";

	    spidev@0 {
		    compatible = "linux,spi-loopback-test";
		    reg = <0>;
		    spi-max-frequency = <10000000>;
	    };
    };

Yielding:

    spi-loopback-test spi0.0: Executing spi-loopback-tests
    spi-loopback-test spi0.0: Running test tx/rx-transfer - start of page
    ...
    spi-loopback-test spi0.0:   with iteration values: len = 131072, tx_off = 0, rx_off = 0
    spi-loopback-test spi0.0: Finished spi-loopback-tests with return: 0
---
 arch/arm64/boot/dts/renesas/r8a77961.dtsi | 62 +++++++++++++++++++++++
 1 file changed, 62 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
index 720592a91f5c0590..9266c60f21faf2b8 100644
--- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
@@ -1189,6 +1189,68 @@ 
 			status = "disabled";
 		};
 
+		msiof0: spi@e6e90000 {
+			compatible = "renesas,msiof-r8a77961",
+				     "renesas,rcar-gen3-msiof";
+			reg = <0 0xe6e90000 0 0x0064>;
+			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 211>;
+			dmas = <&dmac1 0x41>, <&dmac1 0x40>,
+			       <&dmac2 0x41>, <&dmac2 0x40>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+			resets = <&cpg 211>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		msiof1: spi@e6ea0000 {
+			compatible = "renesas,msiof-r8a77961",
+				     "renesas,rcar-gen3-msiof";
+			reg = <0 0xe6ea0000 0 0x0064>;
+			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 210>;
+			dmas = <&dmac1 0x43>, <&dmac1 0x42>,
+			       <&dmac2 0x43>, <&dmac2 0x42>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+			resets = <&cpg 210>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		msiof2: spi@e6c00000 {
+			compatible = "renesas,msiof-r8a77961",
+				     "renesas,rcar-gen3-msiof";
+			reg = <0 0xe6c00000 0 0x0064>;
+			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 209>;
+			dmas = <&dmac0 0x45>, <&dmac0 0x44>;
+			dma-names = "tx", "rx";
+			power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+			resets = <&cpg 209>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		msiof3: spi@e6c10000 {
+			compatible = "renesas,msiof-r8a77961",
+				     "renesas,rcar-gen3-msiof";
+			reg = <0 0xe6c10000 0 0x0064>;
+			interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 208>;
+			dmas = <&dmac0 0x47>, <&dmac0 0x46>;
+			dma-names = "tx", "rx";
+			power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+			resets = <&cpg 208>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		vin0: video@e6ef0000 {
 			reg = <0 0xe6ef0000 0 0x1000>;
 			/* placeholder */