| Message ID | 20201213183759.223246-14-aford173@gmail.com (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | arm64: dts: renesas: Cleanup Beacon Kit and support more SoC's | expand |
On Sun, Dec 13, 2020 at 7:38 PM Adam Ford <aford173@gmail.com> wrote: > The baseboard routes the SPI to a header which can/will be configured at > either the kit level or using device tree overlays. Because the baseboard > be supporting more than one kit, enable at the baseboard level rather > than a bunch of duplicates later. > > Signed-off-by: Adam Ford <aford173@gmail.com> Thanks, I have to trust you on this one, i.e. will queue in renesas-devel for v5.12. Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi index db3ef33faac5..200236b6e0ef 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi @@ -512,6 +512,13 @@ lvds0_out: endpoint { }; }; +&msiof1 { + pinctrl-0 = <&msiof1_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&gpio3 10 GPIO_ACTIVE_LOW>; +}; + &ohci0 { dr_mode = "otg"; status = "okay"; @@ -565,6 +572,11 @@ led_pins: leds { bias-pull-down; }; + msiof1_pins: msiof1 { + groups = "msiof1_clk_g", "msiof1_rxd_g", "msiof1_txd_g"; + function = "msiof1"; + }; + pwm0_pins: pwm0 { groups = "pwm0"; function = "pwm0";
The baseboard routes the SPI to a header which can/will be configured at either the kit level or using device tree overlays. Because the baseboard be supporting more than one kit, enable at the baseboard level rather than a bunch of duplicates later. Signed-off-by: Adam Ford <aford173@gmail.com> --- .../boot/dts/renesas/beacon-renesom-baseboard.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+)