From patchwork Tue Jan 12 16:59:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulrich Hecht X-Patchwork-Id: 12014095 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F016CC433DB for ; Tue, 12 Jan 2021 17:02:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BCA752311C for ; Tue, 12 Jan 2021 17:02:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2391294AbhALRCi (ORCPT ); Tue, 12 Jan 2021 12:02:38 -0500 Received: from mo4-p02-ob.smtp.rzone.de ([85.215.255.83]:26965 "EHLO mo4-p02-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2391377AbhALRCh (ORCPT ); Tue, 12 Jan 2021 12:02:37 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1610470785; s=strato-dkim-0002; d=fpond.eu; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:From: Subject:Sender; bh=wevDMFF2CZU5c/d8FswTjtJDO80KXlrlys7uxwTLNPo=; b=UkMBTUwCJf+gTzhBseHQ0RfU0Q0V+J+ZqaRuJwCUVhqkhHEAqYFINeYcOmd46RNsrC uCchMk+gzsN48tuhFx8dSbPOiSonj2Vtz8Br+hZJh7KOTG81L6LBW/tth3/ltOfYclg7 Prrq6rEmdUxjH834nFeJ05vox/XCHuN93QkBhVOf9aUwUsDC+jKOsjDJYUdGfNcdGpDU o9UHm3PBtA0eMxmdokYYX+VRoCSTEh8GRk4toirHYt85bLwpDqt+zw2pDMzIKtsps1MW ggv3r8XFNHs176BvXtUHYw2jHoGBrury8q0YQKxt+brkLjB5IaF8iPmz3uB91BBgd/Ct YY3Q== X-RZG-AUTH: ":OWANVUa4dPFUgKR/3dpvnYP0Np73dmm4I5W0/AvA67Ot4fvR8XxYaA36" X-RZG-CLASS-ID: mo00 Received: from groucho.site by smtp.strato.de (RZmta 47.12.1 DYNA|AUTH) with ESMTPSA id z08ea3x0CGxcNUQ (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate); Tue, 12 Jan 2021 17:59:38 +0100 (CET) From: Ulrich Hecht To: linux-renesas-soc@vger.kernel.org Cc: wsa@the-dreams.de, geert@linux-m68k.org, hoai.luu.ub@renesas.com, Ulrich Hecht , Geert Uytterhoeven , Wolfram Sang Subject: [PATCH v3 01/12] pinctrl: renesas: r8a779a0: Add I2C pins, groups and functions Date: Tue, 12 Jan 2021 17:59:18 +0100 Message-Id: <20210112165929.31002-2-uli+renesas@fpond.eu> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210112165929.31002-1-uli+renesas@fpond.eu> References: <20210112165929.31002-1-uli+renesas@fpond.eu> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org This patch adds I2C0-6 pins, groups and functions to the R8A779A0 (V3U) SoC. Signed-off-by: Ulrich Hecht Reviewed-by: Geert Uytterhoeven Tested-by: Wolfram Sang --- drivers/pinctrl/renesas/pfc-r8a779a0.c | 107 +++++++++++++++++++++++++ 1 file changed, 107 insertions(+) diff --git a/drivers/pinctrl/renesas/pfc-r8a779a0.c b/drivers/pinctrl/renesas/pfc-r8a779a0.c index 2107189d1f1d..92ba75ca6562 100644 --- a/drivers/pinctrl/renesas/pfc-r8a779a0.c +++ b/drivers/pinctrl/renesas/pfc-r8a779a0.c @@ -1233,6 +1233,69 @@ static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_GPIO_GP_ALL(), }; +/* - I2C0 ------------------------------------------------------------------- */ +static const unsigned int i2c0_pins[] = { + /* SDA0, SCL0 */ + RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 2), +}; +static const unsigned int i2c0_mux[] = { + SDA0_MARK, SCL0_MARK, +}; + +/* - I2C1 ------------------------------------------------------------------- */ +static const unsigned int i2c1_pins[] = { + /* SDA1, SCL1 */ + RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 4), +}; +static const unsigned int i2c1_mux[] = { + SDA1_MARK, SCL1_MARK, +}; + +/* - I2C2 ------------------------------------------------------------------- */ +static const unsigned int i2c2_pins[] = { + /* SDA2, SCL2 */ + RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 6), +}; +static const unsigned int i2c2_mux[] = { + SDA2_MARK, SCL2_MARK, +}; + +/* - I2C3 ------------------------------------------------------------------- */ +static const unsigned int i2c3_pins[] = { + /* SDA3, SCL3 */ + RCAR_GP_PIN(2, 9), RCAR_GP_PIN(2, 8), +}; +static const unsigned int i2c3_mux[] = { + SDA3_MARK, SCL3_MARK, +}; + +/* - I2C4 ------------------------------------------------------------------- */ +static const unsigned int i2c4_pins[] = { + /* SDA4, SCL4 */ + RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 10), +}; +static const unsigned int i2c4_mux[] = { + SDA4_MARK, SCL4_MARK, +}; + +/* - I2C5 ------------------------------------------------------------------- */ +static const unsigned int i2c5_pins[] = { + /* SDA5, SCL5 */ + RCAR_GP_PIN(2, 13), RCAR_GP_PIN(2, 12), +}; +static const unsigned int i2c5_mux[] = { + SDA5_MARK, SCL5_MARK, +}; + +/* - I2C6 ------------------------------------------------------------------- */ +static const unsigned int i2c6_pins[] = { + /* SDA6, SCL6 */ + RCAR_GP_PIN(2, 15), RCAR_GP_PIN(2, 14), +}; +static const unsigned int i2c6_mux[] = { + SDA6_MARK, SCL6_MARK, +}; + /* - SCIF0 ------------------------------------------------------------------ */ static const unsigned int scif0_data_pins[] = { /* RX0, TX0 */ @@ -1342,6 +1405,14 @@ static const unsigned int scif_clk_mux[] = { }; static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(i2c0), + SH_PFC_PIN_GROUP(i2c1), + SH_PFC_PIN_GROUP(i2c2), + SH_PFC_PIN_GROUP(i2c3), + SH_PFC_PIN_GROUP(i2c4), + SH_PFC_PIN_GROUP(i2c5), + SH_PFC_PIN_GROUP(i2c6), + SH_PFC_PIN_GROUP(scif0_data), SH_PFC_PIN_GROUP(scif0_clk), SH_PFC_PIN_GROUP(scif0_ctrl), @@ -1358,6 +1429,34 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(scif_clk), }; +static const char * const i2c0_groups[] = { + "i2c0", +}; + +static const char * const i2c1_groups[] = { + "i2c1", +}; + +static const char * const i2c2_groups[] = { + "i2c2", +}; + +static const char * const i2c3_groups[] = { + "i2c3", +}; + +static const char * const i2c4_groups[] = { + "i2c4", +}; + +static const char * const i2c5_groups[] = { + "i2c5", +}; + +static const char * const i2c6_groups[] = { + "i2c6", +}; + static const char * const scif0_groups[] = { "scif0_data", "scif0_clk", @@ -1388,6 +1487,14 @@ static const char * const scif_clk_groups[] = { }; static const struct sh_pfc_function pinmux_functions[] = { + SH_PFC_FUNCTION(i2c0), + SH_PFC_FUNCTION(i2c1), + SH_PFC_FUNCTION(i2c2), + SH_PFC_FUNCTION(i2c3), + SH_PFC_FUNCTION(i2c4), + SH_PFC_FUNCTION(i2c5), + SH_PFC_FUNCTION(i2c6), + SH_PFC_FUNCTION(scif0), SH_PFC_FUNCTION(scif1), SH_PFC_FUNCTION(scif3),