diff mbox series

[v2,4/4] HACK: make hscif0 console

Message ID 20210121110008.15894-5-wsa+renesas@sang-engineering.com (mailing list archive)
State Rejected
Delegated to: Geert Uytterhoeven
Headers show
Series v3u: add support for SCIF | expand

Commit Message

Wolfram Sang Jan. 21, 2021, 11 a.m. UTC
Just for testing, not for upstream!

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
Changes since v1:
* marked explicitly as HACK

 arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi | 12 ++++++++----
 arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts      |  2 +-
 2 files changed, 9 insertions(+), 5 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
index 1a36239cdc5d..60cc460612ab 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
@@ -372,9 +372,9 @@  mmc_pins: mmc {
 		power-source = <1800>;
 	};
 
-	scif0_pins: scif0 {
-		groups = "scif0_data", "scif0_ctrl";
-		function = "scif0";
+	hscif0_pins: hscif0 {
+		groups = "hscif0_data", "hscif0_ctrl";
+		function = "hscif0";
 	};
 
 	scif_clk_pins: scif_clk {
@@ -384,7 +384,11 @@  scif_clk_pins: scif_clk {
 };
 
 &scif0 {
-	pinctrl-0 = <&scif0_pins>;
+	status = "disabled";
+};
+
+&hscif0 {
+	pinctrl-0 = <&hscif0_pins>;
 	pinctrl-names = "default";
 
 	uart-has-rtscts;
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
index 5617b81dd7dc..9a129e6a78b6 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
+++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
@@ -14,7 +14,7 @@  / {
 
 	aliases {
 		ethernet0 = &avb0;
-		serial0 = &scif0;
+		serial0 = &hscif0;
 	};
 
 	chosen {